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2023-09-23jtagspi/pld: add support from efinix driverDaniel Anselmi2-1/+13
Provide jtagspi with information to use jtagspi for programming spi-flash devices on efinix trion and titanium devices using a proxy bitstream. Change-Id: I4a851fcaafe832c35bd7b825d95a3d08e4d57a7b Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7826 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from lattice certus driverDaniel Anselmi4-0/+90
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice certus and certus po devices. Change-Id: I6a8ec16be78f86073a4ef5302f6241185b08e1c6 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7825 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from lattice ecp5 driverDaniel Anselmi5-1/+88
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice ecp5 devices. Change-Id: I4a4a60f21d7e8685a5b8320b9c6ebdc2693bbd21 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7824 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from lattice ecp2/ecp3 driverDaniel Anselmi3-0/+120
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice ecp2 and ecp3 devices. Change-Id: I39028aba47a74a0479be16d52d318f4bff7f2ed4 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7823 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add interface to get support from pld driversDaniel Anselmi5-47/+245
Jtagspi is using a proxy bitstream to "connect" JTAG to the SPI pins. This is not possible with all FPGA vendors/families. In this cases a dedicated procedure is needed to establish such a connection. This patch adds a jtagspi-mode for these cases. It also adds the needed interfaces to jtagspi and the pld-driver so the driver can select the mode and provide the necessary procedures. For the cases where a proxy bitstream is needed, the pld driver will select the mode and provide instruction code needed in this case. Change-Id: I9563f26739589157b39a3664a73d91152cd13f77 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7822 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23tcl/board: Add TI am62pevm configNishanth Menon1-0/+24
Add basic connection details with AM62P SK/EVM For further details, see: https://www.ti.com/lit/zip/sprr487 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I1ba5e0c7627cf09cc8c221701bc44f73523a4574 Reviewed-on: https://review.openocd.org/c/openocd/+/7893 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com>
2023-09-23tcl/target/ti_k3: Add AM62P SoCNishanth Menon1-2/+11
Add support for the TI K3 family AM62P SoC. This SoC is built on the same base of AM62A7, so reuse the configuration with the exception of the JTAG ID and the actual name used for the R5 core (moved from main domain to wakeup domain). For further details, see https://www.ti.com/lit/pdf/spruj83 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I3a80be9e71204ed7697e51ac1ad488ef405744ef Reviewed-on: https://review.openocd.org/c/openocd/+/7892 Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/board: Add TI j784s4evm configNishanth Menon1-0/+25
Add basic connection details with J784S4 SK/EVM For further details, see: Texas Instruments J784S4 EVM: https://www.ti.com/tool/J784S4XEVM Texas Instruments SK-AM69: https://www.ti.com/tool/SK-AM69 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I09c8a193d53e13b27adb5a6d01f6d937d6be49a1 Reviewed-on: https://review.openocd.org/c/openocd/+/7891 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/target/ti_k3: Add J784s4 SoCNishanth Menon1-0/+33
Add support for the TI K3 family J784S4/AM69 SoC. For further details, see http://www.ti.com/lit/zip/spruj52 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I3c899aed0cb79ab8bbf8077ca6dfe0636cf72288 Reviewed-on: https://review.openocd.org/c/openocd/+/7890 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23tcl/target/ti_k3: Set _CHIPNAME in one placeNishanth Menon1-7/+2
$_soc is set per platform, no point in duplicating _CHIPNAME to explicitly set the information provided by $_CHIPNAME itself. So move it out after the check for CHIP_NAME Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I60d30d6a9a2ce352f66c5bc03075e4ba638e3062 Reviewed-on: https://review.openocd.org/c/openocd/+/7889 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23flash/nor: remove useless bank->next = NULLTomas Vanek4-5/+0
struct flash_bank must be zeroed anyway, calloc() is always used. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I7ab3b9c66f99688c6095a0a547a05448c9e37d68 Reviewed-on: https://review.openocd.org/c/openocd/+/7885 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23flash/nor/at91sam7: fix flash bank allocationTomas Vanek1-4/+26
at91sam7 flash driver allocates a flash bank based on detected flash structure. Use calloc() instead of malloc() - struct flash_bank has to be zeroed. While on this: Return error in case of struct flash_bank or driver_priv allocation fail. Set default_padded_value and erased_value. Use strdup() on bank->name, pointer is freed in flash_free_all_banks() Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: Id890496bfbadb7970ef583256aa4f30a7bff832f Reviewed-on: https://review.openocd.org/c/openocd/+/7884 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-19flash/stm32l4x: support STM32WBA5xx devicesTarek BOCHKATI3-0/+132
STM32WBA5x have a single bank flash up to 1MB Change-Id: I3d720e202f0fdd89ecd8aa7224653ca5a7ae187b Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7694 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17target/cortex_m: support DWT version 2.1 for Archv8_MFedi Bouzazi2-2/+4
According to Arm®v8-M Architecture Reference Manual: section D1.2.59 DWT_DEVARCH, DWT Device Architecture Register, the field REVISION bits [19:16] defines two DWT architectures revision Signed-off-by: Fedi Bouzazi <fedi.bouzazi@st.com> Change-Id: I948dae0710ac921a7f0fbcef3ccacdae99184fe4 Reviewed-on: https://review.openocd.org/c/openocd/+/7800 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17flash: npcx: fix memory leak in npcx_flash_bank_commandAntonio Borneo1-0/+1
Recent commit 62f76b216930 ("flash/nor: add support for Nuvoton NPCX4/K3 series flash") introduces a memory leak for a missing free() on early return for an error. Add the free() on the return path on error. Change-Id: Ica8568a986802e23df2ab7bed4e8cc4bbb6305a5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 62f76b216930 ("flash/nor: add support for Nuvoton NPCX4/K3 series flash") Reviewed-on: https://review.openocd.org/c/openocd/+/7894 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-09-17target/aarch64: add AArch64 mdd and mwd supportDaniel Goehring3-11/+60
For ARMv8, add AArch64 mdd and mwd support. AArch32 not supported. Change-Id: I25490471e16943e5a67d7649595d77643aa9a095 Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7192 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-17tcl/interface/ftdi: Add documentation for HS2Joshua Nekl1-0/+4
Change-Id: I75d6aa0292bf7ff4ebee8752a5e7a3516500cd04 Signed-off-by: Joshua Nekl <Joshua.Nekl@skyworksinc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7881 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17tcl/interface/ftdi: digilent-hs2.cfg SWD configJoshua Nekl1-0/+2
Add SWD_EN and SWDIO_OE config for Digilent HS2 Change-Id: I3f7479bbe2e518ad6f84bf9eb729b54fee4a0f9b Signed-off-by: Joshua Nekl <Joshua.Nekl@skyworksinc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7863 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17server/gdb_server.c: support unavailable registersEvgeniy Naydanov1-19/+30
According to gdb documentation, `g` and `p` packets can report a register being unavailable by a string of 'x' instead of register's value. Change-Id: I8ef279f1357c2e612f5d3290eb0022c1b47d9fa7 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7876 Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Anatoly Parshintsev <kupokupokupopo@gmail.com> Tested-by: jenkins
2023-09-09jtag/drivers/am335xgpio: do not configure push-pull inputs as outputVincent Fazio1-1/+2
Previously, if a pin was configured as ADAPTER_GPIO_INIT_STATE_INPUT and its drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL, initialize_gpio would configure the pin as an output. The set_gpio_value function is optimized to not set the direction for pins configured as ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL as it only needs to be set once. When initialize_gpio performs this setup, it checked only that the drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the output direction but did not exclude input pins which have already had their direction set. Now, input pins are ignored when initialize_gpio checks for ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the mode to output. Fixes: ace028262ba0 ("drivers/am335xgpio: Migrate to adapter gpio commands") Change-Id: I9ea502c400ea4ffae37080b9cee891ca9176a47d Signed-off-by: Vincent Fazio <vfazio@xes-inc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7877 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Steve Marple <stevemarple@googlemail.com>
2023-09-08image: fix binary detection for small filesMarek Vrbka1-5/+10
Previously, if the image file was less than 9 bytes long, it was assumed to be an error when it could be a binary image file. This patch makes OpenOCD detect these cases as binary files. Change-Id: I5b4dad2b547786246887812ac75907378fe58671 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7880 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-08flash/nor: add support for Nuvoton NPCX4/K3 series flashLuca Hung7-141/+247
Added NPCX flash driver to support the Nuvoton NPCX4/K3 series microcontrollers. Add config file for these series. Change-Id: I0b6e128fa51146b561f422e23a98260594b1f138 Signed-off-by: Luca Hung <YCHUNG0@nuvoton.com> Signed-off-by: Mulin CHao <mlchao@nuvoton.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7794 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-08doc/style: clarify default case for enumeratorsAntonio Borneo1-2/+2
Enumerator's case were not specified in the coding style. Add enumerators together with macros for upper-case preference. While there, add the word CamelCase beside the less common, but already used, MixedCaps. This could help linking this chapter to the output of checkpatch script. Change-Id: I6d4af06cc6f4bc46f525e99e9a74ecc167606c49 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7875 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-09-08target: Unify the output of "bp" commandMarek Vrbka1-4/+4
This patch unifies the lines printed by the "bp" command so that different types of breakpoints are printed in the same format. Change-Id: Ic1335eda1c58072a334aed9cf0011431c8ec86a4 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7861 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-08target: Change policy of removing watchpoints/breakpoints.Kirill Radkin3-50/+149
Now internal watch/breakpoint will not be removed in case of error during removing triggers from hardware. Also change signature of some functions (for deletion bp/wp) to print message in case of some error. Change-Id: I71cd1f556a33975005d0ee372fc384fddfddc3bf Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7738 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-02tcl/arc: Fix ARC v2 registers r22/r23Robert Kovacsics1-2/+2
There was a typo in the register numbering. Signed-off-by: Robert Kovacsics <kovirobi@gmail.com> Change-Id: Ie5d306725962c42f1bce976b80968145e6d0a177 Reviewed-on: https://review.openocd.org/c/openocd/+/7860 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-08-29jtag/drivers/bcm2835gpio: do not configure push-pull inputs as outputBrandon Pupp1-1/+2
Previously, if a pin was configured as ADAPTER_GPIO_INIT_STATE_INPUT and its drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL, initialize_gpio would configure the pin as an output. The set_gpio_value function is optimized to not set the direction for pins configured as ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL as it only needs to be set once. When initialize_gpio performs this setup, it checked only that the drive value was ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the output direction but did not exclude input pins which have already had their direction set. Now, input pins are ignored when initialize_gpio checks for ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL to set the mode to output. Change-Id: I4fc7a8132a6b00c7f213ec9fd05c7bbb37ee5f20 Fixes: 0dd969d83bad ("drivers/bcm2835gpio: Migrate to adapter gpio commands") Signed-off-by: Brandon Pupp <bpupp@xes-inc.com> [vfazio: update commit message] Signed-off-by: Vincent Fazio <vfazio@xes-inc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7862 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-08-26contrib/firmware: add new i2c bit-banging feature to angie's firmwareAhmed BOUDJELIDA14-139/+534
add new i2c bit-banging feature, we can now connect in JTAG with the SoC target and in i2c with the main board components at the same time. Change-Id: I8e4516fe1ad5238e0373444f1c3c9bc0814d0f52 Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7796 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26jtag/drivers: add new VIDs for angie driver - add a check for a returned valueAhmed BOUDJELIDA2-4/+10
add a line that checks the returned value of set signals function add two VIDs of other original boards (have onboard angie architecture) so angie driver can connect to them and change their VID after renumeration. Change-Id: Ide4f1f6f38168a410191bf3ff75bcd59dcf7ef50 Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7795 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26mips32: add per-cpu quirks featureArtur Rojek6-1/+104
Introduce the ability to detect CPUs based on CP0 PRId register and apply cpu specific quirks, which alter the default ejtag behavior. First of those is EJTAG_QUIRK_PAD_DRET, which makes sure extra NOPs are placed after the DRET instruction on exit from debug mode. This fixes resume behavior on Ingenic JZ4780 SoC. The proper detection of some (currently unsupported) CPUs becomes quite complicated, so please consult the following Linux kernel code when adding new CPUs: * arch/mips/include/asm/cpu.h * arch/mips/kernel/cpu-probe.c Change-Id: I0f413d5096cd43ef346b02cea85024985b7face6 Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: https://review.openocd.org/c/openocd/+/7859 Tested-by: jenkins
2023-08-26stlink: increase stlink v2 max speed to 2.25 MbpsMarcin Niestroj1-1/+1
stlink v2 on Nucleo-64 board (e.g. NUCLEO-L476RG) has target SWO signal connected to STM32F103CB'S PA10, which is UART1_RX. UART1 within this MCU in theory can be configured to 4.5 Mbps baudrate, which means this is the upper limit supported by HW. As a confirmation BMP (Black Magic Probe) project also states in documentation that UART1 can be used with up to 4.5 Mbps baudrate. Tests have shown that configuring 4.5 Mbps baudrate on stlink v2 available on NUCLEO-L476RG board results in receiving corrupted data. Using 2.25 Mbps however allows to successfully receive all data from SWO. This makes sense in terms of STM32F103CB capabilities, since 2.25 Mbps is the next supported baudrate due to division by 2. Increase supported stlink v2 SWO speed from 2 to 2.25 Mbps. Tested with NUCLEO-L476RG: $ stm32l4x.tpiu configure -protocol uart \ -traceclk 80000000 -pin-freq 2250000 \ -output /dev/stdout $ stm32l4x.tpiu enable 2.25 Mbps speed confirmed with logic analyzer. Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev> Change-Id: Icbec04585664aba8b217e8f9a75458e577f7617f Reviewed-on: https://review.openocd.org/c/openocd/+/7848 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26tcl/board: Add j721e native swd configurationKaelin Laundry2-0/+31
Direct memory driver swd native configuration for j721E Signed-off-by: Kaelin Laundry <wasabifan@outlook.com> Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I27455040f48c47271ae110afd114fce005824969 Reviewed-on: https://review.openocd.org/c/openocd/+/7259 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26tcl/board: Add am625 native swd configurationNishanth Menon2-0/+51
Direct memory driver swd native configuration for am625. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jason Peck <jpeck@ti.com> Change-Id: I6cf521fe9af0a4b8f8ab4853bc25722368b713e6 Reviewed-on: https://review.openocd.org/c/openocd/+/7091 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-08-26jtag/drivers: dmem: Add Emulated AP modeJason Peck2-6/+299
This emulation mode supports software translation of an AP request into an address mapped transaction that does not rely on physical AP hardware. This is necessary in some hardware such as K3 SoCs since the hardware architecture anticipates a potential race condition between AP doing direct memory access generating transactions back to system bus and firewalls that data path out. This emulation mode allows direct memory driver to emulate CoreSight Access Port (AP) and reuse the SoC configuration meant for JTAG debuggers. Since the address ranges are flat in nature, the requisite memory base and size will need to be provided a-priori to the driver for mapping. The other design alternative would be to map requested memory map for every register operation, but, that would defeat our intent of getting max debug performance. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jason Peck <jpeck@ti.com> Change-Id: I2d3c5f7833f1973e90b4f6b247827f62fc2905d0 Reviewed-on: https://review.openocd.org/c/openocd/+/7089 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26jtag/drivers: Add dmem driverNishanth Menon6-0/+424
Direct memory driver support for CoreSight Access Port(AP). Even though we emulate SWD (serial wire debug), we aren't actually using swd. Instead, we are using a direct memory access to get to the register set. This is similar in approach to other fast access native drivers such as am335xgpio drivers. Example operation on Texas Instrument's AM62x K3 SoC: +-----------+ | OpenOCD | SoC mem map | on |--------------+ | Cortex-A53| | +-----------+ | | +-----------+ +-----v-----+ |Cortex-M4F |<───────| | +-----------+ | | | DebugSS | +-----------+ | | |Cortex-M4F |<───────| | +-----------+ +-----------+ Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jason Peck <jpeck@ti.com> Change-Id: I8470cb15348863dd844b2c0e3f63a9063cb032c6 Reviewed-on: https://review.openocd.org/c/openocd/+/7088 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26tcl/board: add TI am62a7evm configJason Kacines1-0/+25
Add basic connection details with am625 SK/EVM For further details, see https://www.ti.com/tool/SK-AM62A-LP Change-Id: I0b6b4004f3a04be7a90207e44c588a4f68aff47a Signed-off-by: Jason Kacines <j-kacines@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7855 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-08-26tcl/target/ti_k3: Add AM62A7 SoCJason Kacines1-0/+23
Add support for the TI K3 family AM62A7 SoC. For further details, see https://www.ti.com/lit/pdf/spruj16a Change-Id: Ie69bde4895f34b04f9967f63d1ca9c8149c50b8a Signed-off-by: Jason Kacines <j-kacines@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7854 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-08-26tcl/target/ti_k3: Add missing documentation for supported SoCsJason Kacines1-0/+4
Add links for the SoCs are supported by the conf file for future reference. Change-Id: Ic5b7786ef3ac31414fe2ce56c1237a18ce99aaa1 Signed-off-by: Jason Kacines <j-kacines@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7853 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-08-26rtos/zephyr: arm: fetch arm exc return offsetBruno Mendes1-0/+1
Since zephyrproject-rtos/zephyr@c3eeae8, Zephyr OS exposes offset of mode_exc_return in the arch struct for ARM. Accounting for this allows for consistency and enables logic with further offsets that may be added after this. Signed-off-by: Bruno Mendes <bd_mendes@outlook.com> Change-Id: Id53ebd80c5d98a7d94eb6b00ad638ce51e719822 Reviewed-on: https://review.openocd.org/c/openocd/+/7851 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-08-26tcl/target: add Realtek RTL872xD configKarl Palsson1-0/+33
Sufficient to probe both cores via multiple APs. No support listed for jtag in the datasheet or usermanual. Tested against a BW-16 board: https://www.amebaiot.com/en/amebad/#partner_bw16 Change-Id: Idf82085e7b7327fdf3d6d668e6fb59eff6e0431b Signed-off-by: Karl Palsson <karlp@tweak.au> Reviewed-on: https://review.openocd.org/c/openocd/+/7847 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-08-26target/cortex_m: Add Realtek Real-M200 and M300Karl Palsson3-0/+14
These cores are advertised as M23 and M33 compatible, but are identified by the Realtek implementor id. These cores are found on the RTL872xD family, at least. Raw CPUIDs: Real-M200 (KM0): 721cd200 Real-M300 (KM4): 721fd220 Change-Id: I4106ccb7e8c562f98072a71e9e818f57999d664e Signed-off-by: Karl Palsson <karlp@tweak.au> Reviewed-on: https://review.openocd.org/c/openocd/+/7846 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-26target/cortex_m: check core implementor fieldKarl Palsson7-38/+52
Presently, we only look at the Part Number field of the CPUID, and completely ignore the Implmentor field, simply assuming it to be ARM. Parts have since been found, with different implementors, that use overlapping part numbers, causing detection to fail. Expand the "part number" field to be a full implementor+part number, excluding the revision/patch fields, to make checking more reliable. Change-Id: Id81774f829104f57a0c105320d0d2e479fa01522 Signed-off-by: Karl Palsson <karlp@tweak.au> Reviewed-on: https://review.openocd.org/c/openocd/+/7845 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-08-26efm32: drop unnecessary and incomplete checksKarl Palsson1-12/+0
There's really no reason to try and add an extra layer of cpu verification here. Change-Id: If8c4aa03754607be6c089f514ae300b09b067ffa Signed-off-by: Karl Palsson <karlp@tweak.au> Reviewed-on: https://review.openocd.org/c/openocd/+/7844 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-12flash/nor/spi: Improve erase performance on zd25q16Nikolay Dimitrov1-1/+1
Use blocks (64 KiB) instead of sectors (4 KiB) when erasing the zd25Q16 SPI flash memory (thanks to Tomas Vanek!) Change-Id: I969a69ad35f51b84eb3e11b93f0d79db3e98613a Signed-off-by: Nikolay Dimitrov <nikolay.dimitrov@retrohub.org> Reviewed-on: https://review.openocd.org/c/openocd/+/7850 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-08-12flash/nor/spi: add zetta zd25q16Nikolay Dimitrov1-0/+1
* Zetta 16 Mbit (2 MiB) SPI flash * Tested on Olimex RP2040-PICO30 and Neo6502 boards Change-Id: I02224dd7a72a9b72f01b31edbd958daa23f28956 Signed-off-by: Nikolay Dimitrov <nikolay.dimitrov@retrohub.org> Reviewed-on: https://review.openocd.org/c/openocd/+/7849 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-08-12pld: allow calling of configuration functions before 'init'Daniel Anselmi2-3/+3
Change-Id: I7c475fbbf8c13ae227e3393f01528eb180e9de51 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7835 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-12pld: fix sparser warningsDaniel Anselmi2-2/+2
Change-Id: I31c5b19cd93ac41b026f824337488c9aa9b12439 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7828 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-12target/aarch64: add missing aarch64_poll() callsDaniel Goehring1-0/+9
Add missing aarch64_poll() calls to ensure the event TARGET_EVENT_HALTED is called when necessary. This is needed with the poller update introduced in commit 95603fae18f8 ("openocd: revert workarounds for 'expr' syntax change") Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Change-Id: I6e91f1b6bc1f0d16e6f0eb76fc67d20111e3afd2 Reviewed-on: https://review.openocd.org/c/openocd/+/7737 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-08-12tcl: add configuration files for the ARC HSDK-4xD boardArtemiy Volkov2-0/+69
This commit provides startup files for the Synopsys DesignWare ARC HSDK-4xD board. These have been adapted from the corresponding snps_hsdk.cfg files, the only functional change being the JTAG IDs for the new board's CPU cores. Change-Id: I19a0cd13bc09de90cfe2a7cccf1239e459fd8077 Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7829 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-08-12tcl/interface/ftdi: support for SIPEED RV-Debuggergudvinr1-0/+13
BL702-based JTAG debugger that emulates FT2232D device Change-Id: Iefbf03645e6d8d154f4b1cad3385b8bc09da37dd Signed-off-by: gudvinr <gudvinr@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7830 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
generated by cgit v1.1 at 2024-09-27 08:32:15 +0000