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2019-06-20helper/options: simplify the code using command_run_linef()Antonio Borneo1-8/+3
Thanks to command_run_linef() there is no need to pre-build the command using alloc_printf(). Change-Id: Iccfebd6063d1ac162f090fe2309b1f51bebf0214 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5226 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20helper/command: make command_run_line reentrantChristopher Head1-0/+6
The `command_run_line` function contains a comment saying it should be reentrant. However, it isn’t: it NULLs out `current_target_override` and doesn’t restore it before returning, and it changes the `context` associated data of the `interp` object and then deletes that associated data before returning rather than restoring it to its previous value. Change-Id: I84fd46ef7173f08cf7c57b9a5b76e4986a60816f Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5223 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20doc: makeinfo extra whitespaceKevin Gillespie1-1/+1
Extra whitespace in file creating build errors with makeinfo. Change-Id: Ib764850c1c8ff596d3c753eadd8e27f8c5982d20 Signed-off-by: Kevin Gillespie <kgills@gmail.com> Reviewed-on: http://openocd.zylin.com/5229 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-19tcl/board: Add SAML11 Xplained Pro Evaluation KitMarc Schink1-0/+10
Change-Id: I118929cdecd9ba1f39d6e2791c114ac7e347b3f5 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5206 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19tcl/target: Add initial Microchip SAML1x supportMarc Schink1-0/+31
There is not flash bank support at the moment. Change-Id: I833c009d9d21cdeb70b57d67eb557d50ed0fb4de Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5205 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19target/cortex_m: Add support for AHB5-APMarc Schink1-1/+10
The AHB5-AP is implemented in Cortex-M23/33 based devices. Change-Id: I505954a2e2c6462ce0aa96eba1d55b016c5028b9 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5232 Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins
2019-06-19target/arm_adiv5: Add type for AHB5-APMarc Schink3-6/+12
This access port type comes with the AMBA 5 protocol specification, see 'C1.3 AP' in ARM IHI 0031D. Change-Id: I3c4f0a69230daaf4f5f979de6213fe3c025a089a Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5231 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2019-06-19Configs for ARM corelink SSE-200 target and Musca A boardOmair Javaid2-0/+115
This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also adds configuration file for SSE-200 based Musca A board. Flash programming support for Musca A QSPI flash is still not functional. This configuration will be updated once that support lands into OpenOCD. Please refer to ARM documentation for more information about SSE-200 and Musca A. Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874 Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/5006 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19Support for debugging on ARMv8-M CPUsOmair Javaid2-15/+62
This patch adds ARMv8-M CPUs detection logic in ARMv7m target specific code. Also adds a slightly different watchpoint manipulation logic for ARMv8-M. This is based on ARMv8-M architecture reference manual. Tested on ARM Musca A board. Change-Id: I0652560954ef02c378a7067fab586edf39d3e9cc Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/4997 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-14target/cortex_a: remove dependency from jtag queueAntonio Borneo1-2/+3
Replace jtag specific API jtag_add_reset() with transport independent API adapter_{de}assert_reset(). Change-Id: I1b917a4c1205115c4e0315373d81a9305e931258 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4944 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14target/aarch64: remove dependency from jtag queueAntonio Borneo1-2/+3
Replace jtag specific API jtag_add_reset() with transport independent API adapter_{de}assert_reset(). Change-Id: I32c43e2e47366363521fa3f387de9e2fb1c20852 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4943 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-13jtag: fix error on TCL command "return" in jtag event handlerAntonio Borneo1-1/+6
The TCL command "return" always returns error code JIM_RETURN, to indicate that the effective error code and message are elsewhere. In the current implementation, the caller of jtag's event only checks for return code JIM_OK and considers any other value, including JIM_RETURN, as an error condition. It can be tested running openocd on a jtag target and adding a jtag event "setup" with a single line "return", e.g. openocd -f board/ti_cc3200_launchxl.cfg \ -c 'jtag configure cc32xx.cpu -event setup return' to get the message: ../src/jtag/core.c:1599: Error: in procedure 'jtag_init' called at file "../src/jtag/core.c", line 1599 Modify jtag_tap_handle_event() to detect the specific return value of the "return" command and to test the real error code that is, eventually, specified to the TCL "return" command. Change-Id: I6d6febc15ef169638afffbffc1810e0b84fcf5c8 Reported-by: Tomas Vanek <vanekt@fbl.cz> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5199 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13target: fix error on TCL command "return" in target event handlerAntonio Borneo1-1/+6
The TCL command "return" always returns error code JIM_RETURN, to indicate that the effective error code and message are elsewhere. In the current implementation, the caller of target's event only checks for return code JIM_OK and considers any other value, including JIM_RETURN, as an error condition, thus dumping the call-trace. The execution is not stopped because the error is not further propagated, but the error message is annoying and misleading. It can be tested running openocd -f ./test.cfg using the following script "test.cfg". You can replace the board file in line 1, to use a board available in your lab: 1 source [find board/st_nucleo_f4.cfg] 2 [target current] configure -event reset-start {} 3 [target current] configure -event reset-end {return} 4 init 5 proc a {} {[target current] invoke-event reset-start} 6 proc b {} {[target current] invoke-event reset-end} 7 proc c {} {a;b;echo "arrived at the end"} 8 c 9 shutdown The execution produces: ./test.cfg:7: Error: in procedure 'c' called at file "./test.cfg", line 8 in procedure 'b' called at file "./test.cfg", line 7 arrived at the end that shows the call-trace but does not halt the execution. The developer can avoid using the "return" command in the event body by defining a TCL procedure that implements the handler and that contains the "return" command, reducing the handler body to a simple call to the procedure above. But this approach is either not documented nor always intuitive while writing the handler, causing waste of time to look for the false error. Modify target_handle_event() to detect the specific return value of the "return" command and to test the real error code that is, eventually, specified to the TCL "return" command. Change-Id: I2b860bab7233c6ed13ee4098e348d7533e1c4626 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4974 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13flash/stm32h7x: fix register names to comply with RM0399 Rev2 and RM0433 Rev6Tarek BOCHKATI1-13/+13
Change-Id: I085d86a2a47f4aeef93a99238e3b80ee294d46df Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5192 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13jtag: drivers: buspirate: chunk SWD switch sequence transfer.Tilman Sauerbeck1-8/+17
Commit c2e18bfaeafd changed the size of the JTAG-to-SWD sequence from 15 bytes to 17 bytes. This broke SWD switch sequence transfer for buspirate, since buspirate packets can only hold a payload of up to 16 bytes and we tried to fit the whole sequence in a single packet. Splitting up the sequence transfer in appropriately sized packets makes buspirate SWD work again (successfully tested with buspirate firmwares v6.1 and v7.0). Change-Id: Ib5b412b9e77287d705d2762e31c16d30318b50e3 Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de> Reviewed-on: http://openocd.zylin.com/5200 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13jtag/drivers/jtag_usb_common: fix typoChristopher Head1-6/+6
Change-Id: If1f56fd5d610b993a4ecbc900fac9f90638037c9 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5202 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-12target: make target re-configuration possible againTomas Vanek1-1/+7
Before commit 877cec20dca6e78f9f029f0f173879cda101a6c2 ("command: check command mode for native jim commands") all the jim commands were erroneously treated as they had mode COMMAND_ANY. The command '$_TARGET configure -xxx' was therefore applicable on running OpenOCD to change the target configuration. It is handy e.g. for changing an event handler or changes of the work area. Change 'configure' command .mode to COMMAND_ANY to make it possible again. The only parameter which cannot be re-configured after init is -gdb-port. Test the command mode and refuse setting of gdb port after init. Change-Id: I88493ac10a46647dc52a88fbc9f8ce6b5ba3bcd0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5214 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12fix XScale register accessMichael Schwingen1-0/+1
since b5964191f0, all XScale-specific registers were missing, breaking config scripts. Change-Id: Ia56f3ca17500ba54bd08f417e9a5aaaa8a1be8c4 Signed-off-by: Michael Schwingen <spam-openocd@discworld.dascon.de> Reviewed-on: http://openocd.zylin.com/5136 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-12mem_ap: fix format of logged addressesAntonio Borneo1-2/+2
The macro TARGET_ADDR_FMT, defined in helper/types.h, already includes the prefix "0x" in front of the hexadecimal number, being defined as: #define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR An additional "0x" is present in mem_ap; it prints debug messages with a double "0x" before the address: Debug: 2921 34180 mem_ap.c:153 mem_ap_write_memory(): Writing memory at physical address 0x0x5000000c; size 4; count 1 Remove the incorrect hexadecimal prefix. Change-Id: I38f19ed2a2f542bd5df53e947a2604f1cbe80e08 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5222 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12ARMv8: Update rtos_reg storage from 8 to 16 bytesDaniel Goehring1-1/+1
To support 128 bit registers, the rtos_reg structure value array needs to be updated from 8 to 16 bytes. Tested by reading ARMv8 NEON FP regs on an Ampere eMAG 8180 with GDB. Change-Id: I7f3fe1a5b2def599d021787fbe9cdd51f92859a4 Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: http://openocd.zylin.com/5209 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12armv7a_mmu: Add support for decoding Super SectionsFlorian Fainelli1-10/+27
The ARMv7-A architecture supports super sections which allows mapping physical addresses up to 40-bit into a 32-bit virtual address using the short descriptor format (see ARM DDI 0406C.c section B4.1.112 for details). Change-Id: I8e64d0e93e36ae7a7da7b7bf2a8342856bb044f1 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/5212 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12armv7a_mmu: Do not restrict virtual addresses to uint32_tFlorian Fainelli3-6/+7
In preparation for adding super section decoding, do not restrict armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A processors with VMSA extensions (including LPAE) can issue wider physical addresses. Update casting to uint32_t where necessary. Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/5211 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12armv7a_mmu: Remove armv7a_mmu_translate_va()Florian Fainelli2-87/+0
This function is not used anywhere in the tree, remove it, such that we only have a single function moving forward that might need to deal with short vs. long format specifics. Change-Id: I80e81cd7eba1e028d1afaeaedb675b46c0ca6fa1 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/5213 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12armv7a_mmu: Check earlier for PAR readFlorian Fainelli1-2/+2
Check earlier that the read of the PAR register was successful instead of starting the decoding and then checking for an error reading that register. Change-Id: Id96c2b2f76d2d1c745fcfa55ad4c1e6db92106f9 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/5215 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-10contrib/rpc_examples: remove 'ocd_' command prefix from haskell exampleAntonio Borneo1-1/+1
The prefixed commands has been removed in commit 0840414f0e57 ("helper/command: do not replace new commands with ocd_ prefix"). Change-Id: I9f101beb85533973041386896bbb215bb141962f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5191 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-06-10contrib/rpc_examples: Remove 'ocd_' command prefixMarc Schink1-4/+4
The prefix is not necessary anymore. Change-Id: Ie0df06a70ff51e6719d7564396739d28618b0196 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5190 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-10target/armv7m: fix register number in armv7m_get_core_reg()Tomas Vanek1-1/+1
armv7m_get_core_reg() calls arm->read_core_reg() arm->read_core_reg() expects the register number as an index to core reglist, not an ARMv7M specific register code. Use reg->number instead of armv7m_reg->num. The change solves assert src/target/armv7m.c:222: armv7m_read_core_reg: Assertion `num < (int)armv7m->arm.core_cache->num_regs' failed. when gdb 'info reg' is issued on a Cortex-M target and no cortex_m_debug_entry() has been called since OpenOCD start (target was halted before OpenOCD start). Change-Id: I32a2294693ef979b613be93aeceb3b0eb06ee6df Ticket: https://sourceforge.net/p/openocd/tickets/216/ Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5203 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-06jtag: set default "jtag_only" to uninitialized transportsAntonio Borneo16-23/+15
For legacy support, drivers that do not define a list of transports get identified as jtag_only. Cleanup this old crust and initialize properly the transports field in the jtag_interface for all the drivers. Change-Id: I9c86064e5d05bd0212bc18f4424414e615e617fe Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4893 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06gdb_server: remove call to jtag_execute_queue()Antonio Borneo1-6/+0
In the initial commit 6c9b804d6187edda4f46f8458deec0b17ec76bb9 in 2007's svn://svn.berlios.de/openocd/trunk@246 a target script gdb_program_config was called before gdb flash programming. To guarantee the script does not left any pending command in the jtag queue, a call to jtag_execute_queue() was inserted after the execution of the script. In following commit ef1cfb23947bd32798077c6abb5c25a049460ae9 in 2008's svn://svn.berlios.de/openocd/trunk@975 the script was replaced by the event "old-gdb_program_config" and the call to jtag_execute_queue() get executed in every case, even if the event handler was not present. At last, commit bb3793c9a4ccd232c4ee3ce0a36bf200589ca0bb ("target: remove legacy target events") stripped away the obsolete event but left the call to jtag_execute_queue(), now completely useless. Remove the call to jtag_execute_queue() and clean-up the code around it. Change-Id: I284f54d656d431ad6cdc25ca18218c09db31bd25 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4911 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06target/cortex_m: remove dependency from jtag queueAntonio Borneo1-1/+1
Since the first commit 09883194f867 that introduced cortex_m, the code has a delay of 50ms after srst has been asserted. The specific delay is implemented through the JTAG_SLEEP command sent in the jtag queue. To remove the dependency from the jtag queue, replace the delay with a transport independent function. In case of jtag transport, this change keeps the same behaviour only if the jtag queue has been flushed before the delay. This does not happen if the call to dap_dp_init(), few lines above, fails while calling a dap_queue_dp_{read,write}(); in this case the jtag queue will be flushed later, after the delay, while in the original code the delay would follow the flushing of the commands already queued. Anyway, this different behavior would only happen in case of DAP already not responsive so anticipating the delay in such error condition is not supposed to add further problems. Change-Id: If15978246764e4266b10e707d86c03e5ed907de7 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4912 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06helper: add bitmap helper primitivesAntonio Borneo2-0/+85
Mainly copied/inspired from Linux kernel code in - include/linux/types.h - include/linux/bitmap.h - include/linux/bitops.h Change-Id: I317b542993ab81530c86553f339b79505d0fef0f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4894 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06jtag: simplify management of non-implemented handlersAntonio Borneo2-48/+29
There is just a single entry point for the jtag API .khz(), .speed_div(), .power_dropout(), .srst_asserted(). Simplify the code by in-lining the default handler. The overall code behaviour is not changed. This change prevents modifying at run-time the content of struct jtag_interface. Inspired from change http://openocd.zylin.com/943 by Evan Hunter <ehunter@broadcom.com> Change-Id: I09aeb76d614db57b1884ac7ee9f00c152cd77849 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4892 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06swd: remove unused API frequency()Antonio Borneo6-55/+0
The specific SWD API to change/query the adapter speed is never called because the equivalent JTAG API is used in place of it. In the restructure of struct jtag_interface, the JTAG API is promoted as global adapter API, thus a specific SWD one is not anymore required. Change-Id: I1e810d255b4dfcd5791b4fac8ae1260c31a057fd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4891 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-04Convert DEBUG_JTAG_IO to LOG_DEBUG_IOAndreas Fritiofson25-506/+361
Change-Id: Ifee9723a57fea93a7022be3299f69680860f236b Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3910 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-04gdb_server: fix GDB_BUFFER_SIZE usage, fix unaligned access during bulk ↵Bohdan Tymkiv3-8/+6
transfers Currently size of the GDB buffer is 16384 bytes but it is treated as nul-terminated string in most of the code, so effective size of the buffer is actually 16383 bytes. OpenOCD responds with `PacketSize=3fff` to qSupported request. Result of GDB's `m` command is encoded in hex so each data byte uses two bytes in the buffer. As a result GDB will split bulk read requests into chunks 0x1fff bytes each. This causes troubles on targets (or memory regions) which support only aligned, word-sized access (such as MMIO buffers). Steps to reproduce (psoc6 target): gdb> dump binary memory dump.bin 0x040320000 (0x040320000 + 65536) OpenOCD: Error: Failed to read memory at 0x40321ffe Error: Failed to read memory at 0x40321000 Error: Failed to read memory at 0x40323000 Error: Failed to read memory at 0x40325ffe Error: Failed to read memory at 0x40329ffa Error: Failed to read memory at 0x40329ffc Error: Failed to read memory at 0x4032bffc Error: Failed to read memory at 0x4032dffa Consolidate GDB_BUFFER_SIZE usage: ensure size of each buffer is (GDB_BUFFER_SIZE + 1), add explicit comment that additional byte is used for nul-termination. Report correct size of the buffer to GDB (0x4000) as recommended in GDB's docummentation: `if the stub stores packets in a NUL-terminated format, it should allow an extra byte in its buffer for the NUL` Checked with clang-asan, clang-analyzer, valgrind - no new errors. Change-Id: I909e8a2c6b010c5d4a304641808d4a807a4ec18d Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/5109 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31jlink: add usb location supportOleksij Rempel1-4/+38
this patch needs latest extended libjaylink version Change-Id: Ib688ba18740717ccce7863e08c09425975b5f153 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4596 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31jtag/drivers/jtag_usb_common: Fix variable nameMarc Schink1-5/+5
Change-Id: I3773afa75724dc71801af39cc9135b7b9585bc47 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5154 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31libjaylink: Update to latest Git versionOleksij Rempel1-0/+0
This version introduces jaylink_device_get_usb_bus_ports() Change-Id: Ib3fea95c3545c1340a6798e100f5ca644ec89510 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4629 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-31jtag/drivers/jtag_usb_common: Remove warningMarc Schink1-3/+0
The warning appears for every possible device during enumeration and provides no useful information for an end-user. Change-Id: I56e7889a5d9d4656de13ad9e21be3a6e1906e05f Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5155 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-25arm_adi_v5: Split CSW bits into AHB/APB/AXILeonard Crestez3-8/+27
The implementation-defined bits have different semantics for each bus and different recommended defaults. Change-Id: I562fe24643bb1f3abc696339e382a75ccf2f2873 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5124 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23target: make handle_md_output() globalTomas Vanek3-64/+8
Remove a copy of handle_md_output() from src/target/dsp563xx.c Change-Id: Iadd003fd1dcdbc7990d46a58ee2e7c30826ac6af Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5175 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-05-23configure.ac: fix minor typoAntonio Borneo1-1/+1
s/overide/override/ Change-Id: Iecacf0d6839a4d23cb1b029f867d7e1a21d482a4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5164 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23guess-rev.sh: fix minor typoAntonio Borneo1-1/+1
s/reecognized/recognized/ Change-Id: I7129090d464d780632c0b7504e48fb90e847b30d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5163 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23HACKING: fix minor typosAntonio Borneo1-3/+3
s/additonal/additional/ s/seperately/separately/ Use uppercase after a '.' Change-Id: I933894ae44924363d634fa07d3de4ceeb4b329e2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5162 Tested-by: jenkins Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23cortex_m: set the debug reason to DBGRQ when NVIC_DFSR indicates EXTERNALTarek BOCHKATI2-1/+4
By definition the EXTERNAL bit in Debug Fault Status Register indicates that an external debug request (EDBGRQ) signal was asserted. Usage example: this could be done by CTI in multicore devices in order to halt all the cores together. Change-Id: I7830455ce5da6702b7d08c8fa7bfe80e4d8a5055 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5157 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23helper/command: remove dead code in command_unknown()Antonio Borneo1-6/+0
Commit 89fa493a3bc34d22eeca06fa4e78523ac3b766a8 removes the top level command "unknown" and adds in command_unknown() some unclear code that should detect a user-implemented "unknown" command. But, all the commands that trigger the execution of the function command_unknown() are registered in register_command_handler() and have the command name prefixed with "ocd_". Due to such "ocd_" prefix in cmd_name, the condition if (strcmp(cmd_name, "unknown") == 0) { ... } is always false. Nobody complained for almost 10 years so we can proceed to remove this dead code, before merging any change that obsoletes the prefix "ocd_" and potentially makes the condition true. Remove the dead code guarded by the condition above. Change-Id: Icf11a956bb2d68fc84e6eb5779edf8e35db8fa53 Fixes: 89fa493a3bc3 ("remove unknown handler") Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5096 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23target: remove unused function target_buffer_get_u8()Antonio Borneo1-6/+0
Left unused after commit "target: unify memory read/write commands", can be removed. Change-Id: Iea6ef9204c8071283a66a679b3d6edbb0c929c5c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5153 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23stm32f7x: Use CHIPNAME-specific name for ITCM bankChristopher Head1-3/+12
Change-Id: Icf67eaecd56ac3fb88bcfa2b7084b846109454e6 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5102 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-05-22doc/openocd.texi: fix bad aarch64 mergeSteven Stallion1-9/+9
The documentation added for commit b3d29cb5441ee5d38e8f7b561a58f03eb269dbe4 was merged after the end of the eSi-RISC section rather than AARCH64. This patch relocates this hunk to the correct location. Change-Id: I46a2d24442556e9e8000b46a5e1af03b83de6d98 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/5181 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20tcl/target: Fix V3M/V3H SoC chipnameMarek Vasut1-4/+4
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the CHIPNAME and swap the SoCs to keep the list sorted. Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5140 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
generated by cgit v1.1 at 2024-09-28 16:36:01 +0000