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2015-03-09atmega: add support for the at90usb128 flashOlivier Esver1-0/+1
Add support for the at90usb128 flash (tested on the RZUSBstick) Change-Id: Ic042d7c403b20a5cc533da00c30ae6e2139bbd10 Signed-off-by: Olivier Esver <olg.esver@gmail.com> Reviewed-on: http://openocd.zylin.com/2557 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-03-09Added system signal handling to Linux versionMateusz Manowiecki3-12/+34
(with http://www.cons.org/cracauer/sigint.html in mind) Change-Id: I15f559bc1122a408c3fb9338ba55c16fab3187e1 Signed-off-by: Mateusz Manowiecki <segmentation@fault.pl> Reviewed-on: http://openocd.zylin.com/2443 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-03-09jtag/drivers/buspirate: add JTAG_STABLECLOCKS cmdMateusz Manowiecki1-0/+15
Solution found on the internet Change-Id: Ied6f7d9b28131a7ac83b203e4c64d4e9ffec0595 Signed-off-by: Mateusz Manowiecki <segmentation@fault.pl> Reviewed-on: http://openocd.zylin.com/2496 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-03-09target & board: AT91SAM7A2 and Olimex SAM7-LA2Arne Wichmann2-0/+99
Initial Support for AT91SAM7A2 on Olimex SAM7-LA2 board. The board seems not to be able to reset into halted mode, as srst is connected to NRESET of the cpu (configured srst_pulls_trst). JTAG RCLK is connected to CLK. Tested with interface/ftdi/olimex-arm-usb-ocd-h.cfg. Change-Id: I2bdd67e3683e45f1119c5850bad294aa107891d8 Signed-off-by: Arne Wichmann <arne.wichmann@gmail.com> Reviewed-on: http://openocd.zylin.com/2318 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-28psoc4 flash driver: cleaned printf PRI... formatsTomas Vanek1-23/+26
Failed build on Mac OS X 10.10.2 was reported in OpenOCD-devel. Cleaning types and printf formats. uint32_t prefered for flash/sector sizes. 2 minor changes in comments. Removed redundant bracket. Change-Id: Ia06b77af59c2c0ffd10869a4b263a760ca8b0a7a Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2558 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2015-02-24nrf51: Update known devices table.Theodore A. Roth1-21/+153
Added new entries to the nrf51_known_devices_table array. New entries are documented in the "nRF51 Series Compatability Matrix V1.0" found on the Nordic Semi web site. Reordered entries to match the order found in the document. Also added an entry for an undocumented hwid discovered while flashing the PCA10031 and PCA10028 dev boards. Change-Id: Icca7da103d437dc28e651f27ab937fe953b9aac9 Signed-off-by: Theodore A. Roth <troth@openavr.org> Reviewed-on: http://openocd.zylin.com/2514 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-24flash/nor/spi: add GigaDevice SPI flashdmitry pervushin1-0/+1
Signed-off-by: dmitry pervushin <dpervushin@gmail.com> Change-Id: I5a239dc67754ef4be1d9ec36186f434b09aa1e25 Reviewed-on: http://openocd.zylin.com/2530 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22cfg: add board and target configs for TI SimpleLink Wi-Fi CC3200 LaunchPadPaul Fertser4-0/+89
Change-Id: I4396ee737c1dad380aa23894bbd1faf75f26d072 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2465 Tested-by: jenkins
2015-02-22Provide genuine F3 nucleo config and source it for STM32F334 Discovery board.Uwe Bonnes2-0/+6
The F334 disco board has a stlink V.2-1 as F3 nucleo boards. Normal F3 disco boards use stlink v2 and can't ne used. Change-Id: I77ebef93b184592f25ff18bb2da776d636f60ff0 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2434 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22tcl/target|board: add configs for Alphascale asm9260tOleksij Rempel2-0/+94
This adds configs for Alphascale asm9260t ARM based SoC and Evaluation Kit based on this chip. Change-Id: Id8d3a1ef204e3ae84540c2693e3d62650ba82f73 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/2515 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22Remove long-deprecated "target count" and "target number" commands.Robert P. J. Day2-92/+0
Given that the manual states that these two subcommands are deprecated and were scheduled to be removed back in 2010, remove them and the corresponding documentation from the manual. Change-Id: Iaac633349d7fcb8b7f964109c7d26dd0cc5fc233 Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-on: http://openocd.zylin.com/1860 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22cfg: Fix Kinetis kwikstik/kx configAndreas Fritiofson2-12/+21
The flash definition belongs in the target cfg. Add some working area and suitable reset_config. Make kx.cfg more similar to klx.cfg. Disable rclk as it is dead slow and a fixed 1MHz clock seems to work. Change-Id: I8328f179c3a33be64403da93616abb48651bdfe6 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2227 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22Add SWD protocol support to sysfsgpioJean-Christian de Rivaz1-49/+229
Based on the initial work on bcm2835gpio.c by Paul Fertser with many additions. Modifications to the GPIO handling was minimal in this patch. A more big modification is required before cleanup the interface between bitbang and sysfsgpio. Change-Id: I54bf2a2aa2ca059368b0e0e105dff6084b73d624 Signed-off-by: Jean-Christian de Rivaz <jc@eclis.ch> Reviewed-on: http://openocd.zylin.com/2438 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22Add SWD protocol support to bitbangJean-Christian de Rivaz2-0/+222
This is based on the initial work by Paul Fertser with addition of the switch sequences and new ACK handling. In case of WAIT response, the sticky bits are cleared and the last operation is repeated. The ACK handling is based on the interpretation of the 8 February 2006 ARM Debug Interface v5 Architecture Specification Change-Id: Id50855b1ffff310177ccf9883dc9eb0d1b4458c8 Signed-off-by: Jean-Christian de Rivaz <jc@eclis.ch> Reviewed-on: http://openocd.zylin.com/2437 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-22gdb_server: ignore stray + in ACK modeMatej Kupljen1-1/+1
I couldn't make OpenOCD to work with GDB. I was always getting this in GDB: (gdb) target remote localhost:3333 Remote debugging using localhost:3333 Ignoring packet error, continuing... Ignoring packet error, continuing... Ignoring packet error, continuing... Ignoring packet error, continuing... Malformed response to offset query, timeout (gdb) While debugging gdb remote protocol, I have seen that gdb responds with: w ++$?#3f And those two '+' seems to confuse the OpenOCD parser, if it sees another '+' sign it emits the DEBUG output and sets the noack_mode to 2. The problem is that we weren't even IN noack mode, this was set to 0 and then it explicitly sets it to 2 and thus turning the noack mode on. Change-Id: If267c9226e57fa83121ded09cf69829f8f0b4b93 Signed-off-by: Matej Kupljen <matej.kupljen@gmail.com> Reviewed-on: http://openocd.zylin.com/2545 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-22 cortex_m: Add Cortex-M0 identification to ROM-table display.Uwe Bonnes1-0/+12
Change-Id: Id7715a83ba9793844475629aaffd10a81ce586b6 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2549 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Stian Skjelstad <stian@nixia.no>
2015-02-22Cortex A: fix extra memory read and non-word sizesChristopher Head1-238/+658
Without this patch, to perform a memory read, OpenOCD first issues an LDC instruction into DBGITR in Stall mode (thus executing the instruction), then switches to Fast mode and reads from DBGDTRTX once for each word to transfer. At the very end of the transfer, the final Fast mode read of DBGDTRTX has, as always, the side effect of re-issuing the LDC instruction. This causes two problems: (1) If the word immediately beyond the end of the requested region is inaccessible, this spurious LDC will cause a fault. On a fast CPU, the LDC will finish executing by the time the poll of DSCR takes place, failing the entire memory read. On a slow CPU, the LDC might finish executing later, leaving an unexpected and confusing sticky fault lying around for the next operation to see. (2) If the LDC succeeds, it will leave the loaded word in DBGDTRTX, thus setting DBGDSCR.TXFULL=1. The cortex_a_read_apb_ab_memory routine completes without consuming that last word, thus confusing the next routine that tries to use DBGDTRTX (this may not have any visible effect on some implementations, because writing to DBGDTRTXint when TXFULL=1 is defined as Unpredictable, but I believe it caused a visible problem for me). With this patch, the bulk mem_ap_sel_read_buf_noincr is modified to omit the last word of the block. The second-to-last read of DBGDTRTX by that function will cause the issue of the LDC for the last word. After switching back to Normal mode and waiting for that instruction to finish, do a final read of DBGDTRTX to extract the last word into the buffer, leaving TXFULL=0. Without this patch, memory accesses are always expanded such that they are aligned to the access size. With this patch, accesses are issued exactly as ordered by the caller. The caller is expected to handle fragments at the beginning and end of the transfer if the address is unaligned and an unaligned access is not desired. Without this patch, the DFAR and DFSR registers, which report the location and status of data faults, are ignored while performing memory accesses, which could cause problems debugging an OS page fault handler. With this patch, DFAR and DFSR are preserved across memory accesses, and DFSR is decoded in the event of a synchronous fault to provide the caller with more information about the reason for failure. Thanks to Boris Brezillon for the original patch whose ideas led to the non-word access mechanism implemented here and to various code reviewers for their comments. Change-Id: I11ae7104fbe69a522efadefc705c9a217a7eef41 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/2381 Tested-by: jenkins Reviewed-by: Olivier Schonken <olivier.schonken@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-12doc: stellaris driver supports Tiva C tooPaul Fertser1-5/+4
Change-Id: I3b77bf0617c0bbba85cfd678adece57aa7d03e32 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2509 Tested-by: jenkins
2015-02-12flash/nor/stm32lx: add all the IDs and revisions from current RMPaul Fertser1-7/+26
RM0038 Rev.12 lists these new parts and introduces the category naming scheme. RM0367 Rev.2 (STM32L0x3 RM) doesn't add any new codes. Change-Id: Id95dd48dda64d5f108dac57d265d29a7db3a1bd1 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2495 Tested-by: jenkins
2015-02-12README, doc: add mrvlqspi flash driver informationPaul Fertser2-4/+12
Change-Id: I7a270cdaf3d9119aa75285a8d1e063c2fe2a31b7 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2510 Tested-by: jenkins
2015-02-12doc, README: mention all the variants supported by lpc2000 driverPaul Fertser2-9/+12
Change-Id: I66f9a201426a68fc1314ab7f02b27e36dcab33ba Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2508 Tested-by: jenkins
2015-02-11flash/nor/at91samd: add small delay before checking nvm statusAndrej Kazmin1-0/+3
OpenOCD's SWD subsystem doesn't currently have a consistent WAIT handling (i.e. it doesn't ever retry, just returns an error), so right after a row write a small delay is needed as AHB access is stalled during the flashing operation. The issue was exposed with a samd20 using ftdi SWD transport. Change-Id: I07d99d3a96845cc689c3904a41f4d41344f200aa Signed-off-by: Andrej Kazmin <funnyfish@funnyfish.botik.ru> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2268 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11flash/startup: extend "program" command to accept "exit"Paul Fertser2-18/+28
This optional argument tells OpenOCD to exit after finishing (either succesfully, or with an error) the programming sequence. Without it OpenOCD stays running. Change-Id: I6ecaf33ff985eea9a9cd02ff644a74403ae3e1e5 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2492 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-11server: shutdown command should lead to exit without evaluating the restPaul Fertser1-1/+1
Currently openocd -c "echo a1; shutdown; echo a2" outputs both "a1" and "a2" and only then shuts down. This patch fixes it by making shutdown command throw an exception, so unless it's caught the shutdown will behave as expected. Change-Id: I764268b3a9046ff3e9717d04095ea0673f1d755a Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2511 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-11target/profiling: Use the correct method to access registersAndreas Fritiofson1-1/+1
Change-Id: I6b8590dc9d07886b885013b1b767fe2f0739cd6a Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2479 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11xscale: Use the correct method to access registersAndreas Fritiofson1-2/+2
Change-Id: I900a0787812cb24d1f74ca50eb6bb4f85375a353 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2478 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11hla_target: Use the correct method to access registersAndreas Fritiofson1-1/+1
Change-Id: I853fc5117bdf07ecbc4584ff59d324367b2cb3e3 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2477 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11cortex_m: Use the correct method to access registersAndreas Fritiofson1-4/+10
Convert the DWT register store to use a byte array and fix the byte order bug uncovered by that. Also fix an incorrect access of the PC value. Change-Id: Idb5acab71bdf5a96895c358324b05c335e4d32ca Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2476 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11nds32: Use the correct method to access registersAndreas Fritiofson2-27/+32
The registers are represented as bit arrays intended to be accessed using the buf_set_* and buf_get_* functions. Storing the register values in integers enables accessing them directly, which gives different results depending on host byte order. Convert the register store to use a byte array instead and fix all the byte order bugs uncovered by that. Also merge the 32 and 64 bit register fields. Only one of them is used at a time and after the change to byte arrays their types are also the same. Change-Id: I456869a1737f4b4f5e8ecbfc1c63c49a75d21619 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2475 Tested-by: jenkins Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11mips32: add gdb target description supportAntony Pavlov2-77/+167
This commit is inspired by commit 1255b18fc650193094666ba8afd2018089cc9794 Author: Spencer Oliver <spen@spen-soft.co.uk> Date: Fri Sep 13 09:44:36 2013 +0100 armv7m: add gdb target description support Change-Id: I75c3971fd0599d34ed49fb73975378b57f2a4af0 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> CC: Spencer Oliver <spen@spen-soft.co.uk> CC: Oleksij Rempel <linux@rempel-privat.de> CC: Paul Fertser <fercerpav@gmail.com> CC: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-on: http://openocd.zylin.com/1972 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2015-02-11mips32: use 'unsigned int' for CPU register indicesAntony Pavlov2-16/+15
Change-Id: I77e94b2fe0943a87e1d18d88ebf2a0133aaad728 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-on: http://openocd.zylin.com/2216 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11tcl/interface/ftdi: correct LED config for BusBlaster KT-LinkAnton Kuzmin1-1/+1
Configure the LED to be off by default, blink on activity. Change-Id: I8515ee66c49bddf866268b85811be15c2dbc086c Signed-off-by: Anton Kuzmin <anton.kuzmin@cs.fau.de> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2539 Tested-by: jenkins
2015-02-11sim3x: new flash driver for Silabs SiM3 microcontroller familyAndreas Bomholtz7-47/+1349
This is a new driver for Silicon Laboratories SiM3 microcontroller family, based on the work of Ladislav Bábel. The driver will try to detect the type of MCU from the device id register, and if this fails it will use the flash size from the flash bank command. Driver added to the documentation and to the README. TCL script added. Tests: * Hardware: SiM3C166 (pre-production) and SiM3U167 * Binary: 4kb, 197kb, 256kb * Flash protect not tested Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc Signed-off-by: Andreas Bomholtz <andreas@seluxit.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2078 Tested-by: jenkins
2015-02-11nrf51 - Add async loader. Performance on nrf51822QAA/stlink-v2 from ↵Angus Gratton3-90/+251
~3.5KiB/s to ~19.5KiB/s. Change-Id: Ib0bf41a0cec85f0bd5728551f8ad7f6255e4ea04 Signed-off-by: Angus Gratton <gus@projectgus.com> [spamjunkeater@gmail.com: Cleanup buffer allocation, detect -1 for unknown pages] Signed-off-by: Erdem U. Altunyurt <spamjunkeater@gmail.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2204 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11armv7a: fix interpretation of MMU tableDaniel Glöckner1-29/+17
On armv7 there no longer are 1kB pages. Instead the bit that in older architectures distinguished 1kB pages from 4kB pages is on armv7 used for as execute-never marker. There may now also be 16MB supersections with 40 bit physical address. Change-Id: I959bdb8012782a9d07d968907a21f50e3d9b356a Signed-off-by: Daniel Glöckner <daniel-gl@gmx.net> Reviewed-on: http://openocd.zylin.com/2386 Tested-by: jenkins Reviewed-by: Vladimir Svoboda <ze.vlad@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11J-Link serial number config optionJoerg Fischer3-2/+44
Add serial option to jlink config commands, handy when there is more than one adapter connected. To select adapter 0123456 for OpenOCD, use jlink serial 0123456 Change-Id: Ib29ce3f0c4975e1169211721a4531bf4db61f1ee Signed-off-by: Joerg Fischer <turboj@gmx.de> Reviewed-on: http://openocd.zylin.com/2521 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11cortex_a: Add Cortex-A5 identificationOlivier Schonken3-0/+10
Add Cortex-A5 identification to ROM-table display, and also to cortex_a_init_debug_access. This change is mostly cosmetic. Change-Id: I7b1dd8755d70d45eb5f315aa1918d44a813b3cdf Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com> Reviewed-on: http://openocd.zylin.com/2483 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11README: mention "transport select" in quickstart sectionPaul Fertser1-1/+5
Change-Id: I027635c3c8632efcf58cf979b9cb2f99e9e7f046 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2512 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-11target/image: fix undefined behaviour when loading with GDBPaul Fertser1-0/+1
The image struct is malloc'd and hence base_address_set doesn't have a defined value. Caught by Valgrind. Change-Id: Ice15b2299fc768e44e8034eeb93e035076eacd03 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2524 Tested-by: jenkins Reviewed-by: Stian Skjelstad <stian@nixia.no> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-11doc: document the OCL (on chip flash loader) driverPaul Fertser1-1/+7
Change-Id: I8afe870c7a16b04473f4822c2df9a7607f0480e7 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2529 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-11tcl: add TP-LINK TL-MR3020 to the firmware recovery scriptOleksij Rempel1-0/+1
This adds the board to the list of supported devices for the easy recovery procedure. Only ram_boot is supported for this target. Change-Id: I144e1836f8b6257e96a42c98c2668da74ce243f6 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/2520 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de>
2015-02-11tcl/target|board: add config Atheros ar9331Oleksij Rempel2-0/+60
Add configs for Atheros ar9331 MIPS based WiSoC and board based on this chip: TP-LINK TL-MR3020 Change-Id: I9e99719bce4bbb28311f6e9cddb32288db6e7b91 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/2519 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11target: write gmon.out according to target endiannessJose de Sousa1-17/+15
After profiling gmon.out was being written in little endian format only which would cause gprof to issue and error and exit on big endian targets. Change-Id: I526a40adae0f9a439fc5b77cef30fda228198b48 Signed-off-by: Jose de Sousa <jose.t.de.sousa@gmail.com> Reviewed-on: http://openocd.zylin.com/2168 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11mini51: support for Nuvoton NuMicro M051 series flash memoryPawel Si2-217/+411
adds flash support for Nuvoton M052, M054, M058, M0516 microcontrollers into the mini51 driver, patch also adds support for programing LDROM, flash data and flash config. I've tested it on a M0516LBN microcontroller using an ST-LINK/V2: 1. removing security lock: openocd -f interface/stlink-v2.cfg -f target/m051.cfg -c "init ; halt ; mini51 chip_erase; exit" 2. flashing: openocd -f interface/stlink-v2.cfg -f target/m051.cfg -c "program file.hex" Change-Id: I918bfbb42461279c216fb9c22272d77501a2f202 Signed-off-by: Pawel Si <stawel+openocd@gmail.com> Reviewed-on: http://openocd.zylin.com/2426 Tested-by: jenkins Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11tcl/target: add CC2538 and CC26xx target files (with cJTAG procedure)Jacob Palsson3-0/+91
Added support for the Cortex-M3 based TI low power RF SoC CC2538 and the CC26xx family. These chips need a start sequence for switching from cJTAG to JTAG before being used with OpenOCD, this is done in the tcl proc ti_cjtag_to_4pin_jtag in the ti-cjtag.cfg config. The configs for CC2538 and CC26xx run the start sequence on post-reset event and set the ICEPick IDCODE in the data register for OpenOCD to read, this is done so that every time OpenOCD resets the device, it will enable JTAG. Change-Id: I7db620211c0e7e03fad59d24fe31d23a9cdcfedc Signed-off-by: Jacob Palsson <jaaacke@gmail.com> Reviewed-on: http://openocd.zylin.com/2232 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11em357: added target files for em357 and em358Ed Beroset2-0/+81
This patch adds support for Silicon Labs (formerly Ember) EM357 and EM358 chips and derivatives. Change-Id: Ie63aed95a2f4ef1a6b955e301a51b4de1b3a5462 Signed-off-by: Ed Beroset <beroset@ieee.org> Reviewed-on: http://openocd.zylin.com/2470 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11jlink: Added hardware version number for JLink firmware on LPC-Link2Nemui Trinomius1-14/+25
JLink firmware on LPC-Link2 has unique hardware version number(0x12). Change-Id: I76b6e27c47d236da75c61dd6b83d6a823615968d Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-on: http://openocd.zylin.com/2298 Tested-by: jenkins Reviewed-by: Anders Oleson <anders@openpuma.org> Reviewed-by: Xiaofan <xiaofanc@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11cfg: TI Tiva C dk-tm4c129x Evaluation KitsHeinz Schweiger1-0/+14
New Texas Instruments Tiva C Series Boards http://www.ti.com/tool/dk-tm4c129x Change-Id: I44f96982e91786b977b3d29e0f4c7053d584a703 Signed-off-by: Heinz Schweiger <openocd@htl-steyr.ac.at> Reviewed-on: http://openocd.zylin.com/1867 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11lpc2000: add chip IDs for LPC11U6x/LPC11E6xMichael Brown1-0/+22
Change-Id: I53568674951ec8a5db5e191c7b50c60b5a84d0b6 Signed-off-by: Michael Brown <fractalmbrown@gmail.com> Reviewed-on: http://openocd.zylin.com/2463 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11psoc4: support for Cypress PSoC 41xx/42xx familyTomas Vanek6-2/+988
New NOR flash driver was derived from stm32lx. Procedure ocd_process_reset_inner is overriden in psoc4.cfg to handle reset halt and system ROM peculiarities. Change-Id: Ib835324412d106ad749e1351a8e18e6be34ca500 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2282 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
generated by cgit v1.1 at 2024-10-31 09:58:23 +0000