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2015-11-03target: tell which target state is meantOleksij Rempel1-1/+2
If we work on smp system, the output of step command will depend on Id of default target. This patch adds additional information to help find what on which core is happening. Example of LOG after this patch. imx6.cpu.1: target state: halted ^^^^^^^^^^ target halted in ARM state due to breakpoint, current mode: Supervisor cpsr: 0x60000093 pc: 0x80076c0c MMU: enabled, D-Cache: enabled, I-Cache: enabled imx6.cpu.0: target state: halted ^^^^^^^^^^ target halted in ARM state due to debug-request, current mode: Supervisor cpsr: 0x20000193 pc: 0x802ccb6c MMU: enabled, D-Cache: enabled, I-Cache: enabled Change-Id: I536a2cce33b5ab10af9de2a43b9960320c17729f Signed-off-by: Oleksij Rempel <external.Oleksij.Rempel@de.bosch.com> Reviewed-on: http://openocd.zylin.com/2691 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03cortex_m: dwt_num_comp should be set to zero in cortex_m_dwt_free()Tomas Vanek1-0/+1
A segmentation fault in cortex_m_endreset_event() is sometimes raised with very broken target like Kinetis Kx with erased flash and active WDOG. Debugging revealed that cortex_m->dwt_num_comp is 4 and dwt_list is NULL at cortex_m:290 Change-Id: I229c59d6da13d816df513d1dbb19968e4b5951e2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2989 Reviewed-by: Thomas Schmid <thomas@rfranging.com> Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-03lpc4350_spifi_generic: Clean up work area sizeAndreas Färber1-5/+0
Since 2cbbe9a it was actually decreasing the configured work area size. We could now do "set WORKAREASIZE 0x2000" before sourcing lpc4350.cfg, but there seems no point in doing so. Simply drop the configuration here. Change-Id: I25b9dbbc007ba652b66099832198b7c329929858 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3086 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-03rtos/mqx: Fix uninitialized parts of symbol tabledaniel-k1-1/+1
Memory for the symbol table was allocated by malloc but not initialized other than with the symbol name. Therefore `address` and `optional` members were having arbitrary values leading to every symbol being optional most of the time which messes up RTOS auto-detection. Memory will now be zero-initialized as in other RTOS implementations. Change-Id: I6c6e31ec1ef7e043061adf8c695b2139620e005d Signed-off-by: Daniel Krebs <github@daniel-krebs.net> Reviewed-on: http://openocd.zylin.com/3017 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03lpc8xx: Allow CHIPNAME overrideAndreas Färber1-1/+3
Default to lpc8xx as before, but allow setting the actual CHIPNAME. Change-Id: I5a48fa75c640440a0d4c3f2858653e94bed846d2 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3084 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-11-03Change from sys/poll.h to standard poll.h locationPaul Fertser2-3/+3
According to "man 2 poll" the correct header to include is poll.h, not sys/poll.h. Reported by a build against musl. Change-Id: I5298b49dc947d1a368e423104c0c0c7b9bdd1a10 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2947 Tested-by: jenkins
2015-11-03tcl: add STM32F469 discovery board configMaxime Coquelin1-0/+12
Change-Id: Iad7ee06330b3259ea0ce0d174dfdade6785913eb Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Reviewed-on: http://openocd.zylin.com/3043 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03flash/nor/stm32f2x: Add STM32F469 partMaxime Coquelin1-0/+2
Change-Id: I4e13ceb0ba954dc2fea059ddeef10109be938c9c Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Reviewed-on: http://openocd.zylin.com/3042 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03board: don't hardcode interface for ti_beagleboneMatthias Welwarsky1-3/+0
Board files should not select the interface. The BeagleBone Black is not limited to just one JTAG interface. Change-Id: I71ccc3dd9e2ca331a436701fab04e548b0abf829 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3083 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30rtos: handle STKALIGN adjustments on cortex mAndrew Ruder2-1/+53
In the case that the STKALIGN bit is set on Cortex M processors, on entry to an exception - the processor can store an additional 4 bytes of padding before regular stacking to achieve 8-byte alignment on exception entry. In the case that this padding is present, the processor will set bit (1 << 9) in the stacked xPSR register. Use the new calculate_process_stack callback to take into account the xPSR register and use it on the standard Cortex_M3 stacking. Note: Change #2301 had some misinformation regarding the padding. On Cortex-M the padding is stored BEFORE stacking so xPSR is always available at a fixed offset. Tested on a Cortex-M0+ (Atmel SAMR21) board which has STKALIGN fixed to a '1' such that this alignment always occurs on non-aligned stacks. Behavior of xPSR verified via the (bad-sorry) assembly program below by setting a breakpoint on the SVC_Handler symbol. The first time SVC_Handler is triggered the stack was 0x20000ff8, the second time SVC_Handler is triggered the stack was 0x20000ffc. Note that in both cases the interrupt handler gets 0x20000fd8 for a stack pointer. GDB exerpt: Breakpoint 1, 0x000040b6 in Reset_Handler () (gdb) hbreak SVC_Handler Hardware assisted breakpoint 2 at 0x40f8 (gdb) cont Continuing. Breakpoint 2, 0x000040f8 in SVC_Handler () (gdb) print $msp $3 = (void *) 0x20000fd8 (gdb) x/9w $msp 0x20000fd8: 0x1 0x2 0x3 0x4 0x20000fe8: 0x88160082 0xa53 0x40ce 0x21000000 0x20000ff8: 0x0 (gdb) cont Continuing. Breakpoint 2, 0x000040f8 in SVC_Handler () (gdb) print $msp $4 = (void *) 0x20000fd8 (gdb) x/9w $msp 0x20000fd8: 0x1 0x2 0x3 0x4 0x20000fe8: 0x88160082 0xa53 0x40e8 0x21000200 0x20000ff8: 0x0 Assembly program: .cpu cortex-m0plus .fpu softvfp .thumb .syntax unified .section .vectors @ pvStack: .word 0x20001000 @ pfnReset_Handler: .word Reset_Handler + 1 @ pfnNMI_Handler: .word 0 @ pfnHardFault_Handler: .word 0 @ pfnReservedM12: .word 0 @ pfnReservedM11: .word 0 @ pfnReservedM10: .word 0 @ pfnReservedM9: .word 0 @ pfnReservedM8: .word 0 @ pfnReservedM7: .word 0 @ pfnReservedM6: .word 0 @ pfnSVC_Handler: .word SVC_Handler + 1 .section .text .global Reset_Handler Reset_Handler: cpsie i ldr r0, .stack_start ldr r2, .stack_last eors r1, r1 .loop_clear: str r1, [r0] adds r0, r0, #4 cmp r0, r2 bne .loop_clear subs r2, r2, #4 mov sp, r2 movs r0, #1 movs r1, #2 movs r2, #3 movs r3, #4 svc #0 ldr r0, .stack_start ldr r2, .stack_last eors r1, r1 .loop_clear2: str r1, [r0] adds r0, r0, #4 cmp r0, r2 bne .loop_clear2 mov sp, r2 movs r0, #1 movs r1, #2 movs r2, #3 movs r3, #4 svc #0 .loop: b .loop .align 4 .stack_start: .word 0x20000f00 .stack_last: .word 0x20000ffc @ first call - 0x2000fff8 -- should already be aligned @ second call - 0x2000fffc -- should hit the alignment code .global SVC_Handler SVC_Handler: bx lr Change-Id: Id0940e6bbd6a59adee1378c0e86fe86830f0c8fc Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Paul Fertser <fercerpav@gmail.com> Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com> Cc: Evan Hunter <evanhunter920@gmail.com> Cc: Jon Burgess <jburgess777@gmail.com> Reviewed-on: http://openocd.zylin.com/3003 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30rtos: turn stack alignment into a function pointerAndrew Ruder9-18/+58
Some targets (Cortex M) require more complicated calculations for turning the stored stack pointer back into a process stack pointer. For example, the Cortex M stores a bit in the auto-stacked xPSR indicating that alignment had to be performed and an additional 4 byte padding is present before the exception stacking. This change only sets up the framework for Cortex-M unstacking and does not add Cortex-M support. Note: this also fixes the alignment calculation nearly addressed by change #2301 entitled rtos/rtos.c: fix stack alignment calculation. Updated calculation is in rtos_generic_stack_align. Change-Id: I0f662cad0df81cbe5866219ad0fef980dcb3e44f Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Paul Fertser <fercerpav@gmail.com> Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com> Cc: Evan Hunter <evanhunter920@gmail.com> Cc: Jon Burgess <jburgess777@gmail.com> Reviewed-on: http://openocd.zylin.com/3002 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2015-10-30Add handling for STM32L4.Uwe Bonnes4-0/+1020
Option handling not yet implemented. Change-Id: I5a11ef3221896cb02babe4e6e71073c43aa8740b Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2941 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30stm32f2x: Add memory barrier needed for STM32F7 flashing.Uwe Bonnes2-2/+4
Change-Id: I44fca55c46fc8f960ba46a0604692ce98909face Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2939 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-10-30stm32f2x.c: Add STM32F74x handling.Uwe Bonnes1-6/+36
Change-Id: I2e7a8e9f855fc99a3f2535e2af6c0921329a5013 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2940 Tested-by: jenkins Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com> Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30stm32f2x.c: Handle STM32F42x/43x 1 MiByte devices with DB1M option set.Uwe Bonnes1-21/+42
Change-Id: Ic51d34a9abe9693fd21e9b3247523821b6fb1fe3 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2938 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30quark: updating license to GPLv2+Ivan De Cesaris5-10/+15
Intel is relicensing our contributions to OpenOCD under GPL version 2 or any later version. We previously contributed code under GPL version 2 only. It was not our intention to differ from the standard OpenOCD license. We're correcting that here. This also applies retroactively to previous versions of our contributions to OpenOCD. Change-Id: I5e831ed95d03d2044d8e5a8375b21c6e52c933d7 Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com> Reviewed-on: http://openocd.zylin.com/3044 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-10-30tcl/board: Add Diolan LPC4357-DB1 configAndreas Färber2-1/+11
Adapted from diolan_lpc4350-db1.cfg. Both boards are identical except for the SoC, so keep them in sync. Change-Id: If892d8e953b0e3a9209a95b3b23a547357c10b7a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3038 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Add LPC4357 configAndreas Färber2-0/+21
Reuse the flashless LPC4350 as base and amend it as necessary. The LPC43x7 have 2x 512 KB of flash. Change-Id: Ia7ffbc7101023479971984b839f171ed4be6b089 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3037 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30docs: added note for increasing gdb remotetimeout when using the "gdb_port ↵fenugrec1-0/+5
pipe" command. Change-Id: I9c9514a193fd65454890571a17373b9c64d84757 Signed-off-by: fenugrec <fenugrec@users.sourceforge.net> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3040 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30doc: Fix sort order of flash driversAndreas Färber1-83/+83
fm3, nrf51, mdr, sim3x were at the end of the section rather than inserted alphabetically. Fix this before adding further drivers. Change-Id: Id23e04749cdd3b25d7503ec00fac554742d48c77 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3019 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30tcl/board: Add Spansion SK-FM4-U120-9B560 configAndreas Färber1-0/+17
Change-Id: I01464b2a999890d50b95d0fb98ff46d8a04a2c57 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3009 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30Cortex-M: Detect Flash Patch Revision and implement Rev. 2 handling.Uwe Bonnes2-3/+15
E.g. STM32F7 implements Rev.2. Supercedes abandoned patch 2755 that doesn't evaluate Flash patch revision. Change-Id: I48756b0451c7359475066969c900978a536bc328 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2868 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30fm4: Add JTAG supportAndreas Färber1-0/+2
Add support for the JTAG TAPID found on SK-FM4-U120-9B560-MEM V1.1.0 board. Change-Id: Idbfe28927e0c549f0c89c29904d23971281927c9 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3039 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Prepare FM4 MB9BFxxx familyAndreas Färber1-0/+15
It is found on the SK-FM4-U120-9B560-MEM V1.1.0 among others. Change-Id: I4c708c9391e954cbbc8d0860a2a2dbd264aea865 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3008 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30fm4: Split out S6E2CC family configAndreas Färber2-2/+18
Its memory layout is different from MB9BFxxx. Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3007 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/board: Add Arndale configAndreas Färber1-0/+8
Tested with Olimex ARM-USB-OCD-H adapter. Change-Id: I1bf68176f9c155f8803df5a10a7fbe03116c6309 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3081 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Add Exynos5250 configAndreas Färber1-0/+23
Change-Id: Ia673d3f16b2238d5af8fbeff2d57c6cf27dcffb1 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3080 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/board: Add config for XMOS xCORE-XA Core Module ARM debuggingAndreas Färber1-0/+16
The xCORE-XA Core Module board has an XS1-XAU8A-10 SoC with 8 xCORE cores and one ARM core. This config is for the ARM Cortex-M3, via J-Link OB. Tested with "J-Link OB-STM32F103 V1 compiled Feb 5 2014 13:48:52". Change-Id: Id7fadf8f323b45d5cfc0cae1054bd7b916771d6a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2763 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-30tcl/target: Add config for XMOS XS1-XAU8A-10's ARM coreAndreas Färber1-0/+16
The XS1-XAU8A-10 has 8 xCORE cores and one ARM core. This config represents the ARM Cortex-M3 core, which is apparently Silicon Labs EFM32 Giant Gecko IP. Change-Id: I998360f096c759d2e274d96c1ca2e0450ba61146 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2762 Tested-by: jenkins Reviewed-by: Oleksij Rempel Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-30tcl/board: Add Digilent Analog Discovery configForest Crossman1-0/+18
Change-Id: Idf2cb8d8578e650fda4082f6bbf272518762ebf0 Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/2752 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2015-10-21tcl: Support for reading "Device DNA" from Spartan 6 devices.Tim 'mithro' Ansell1-0/+36
Most Xilinx FPGA devices contain an embedded, unique device identifier called the "Device DNA". The identifier is nonvolatile, permanently programmed into the FPGA, and is unchangeable providing a great serial / tracking number. Debugging was done in https://github.com/timvideos/HDMI2USB/issues/36 Change-Id: Iad03eafb40887f0321a4dc22858a7c3bf37a12b3 Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2960 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-21tcl: Adding the Numato Opsis board.Tim 'mithro' Ansell1-0/+10
Another board supported by the ixo-usb-jtag project. Change-Id: I676197c64e208886bc03d1bafcc964ef1fc2160b Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2963 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-21tcl: Adding the Digilent Atlys board.Tim 'mithro' Ansell1-0/+17
The board is supported via the ixo-usb-jtag firmware. Change-Id: I1e8a5ead850c0843b8532a5b54a7e7117778278e Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2962 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-21tcl: Setting lowlevel driver for ixo-usb-jtagTim 'mithro' Ansell1-3/+31
Also add further documentation about the project and how to use it. Change-Id: Ia9878de566b3c8c1ea29f129287d5aea904d861d Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2961 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-09nrf51: recognize hwid 0084Peter A. Bigot1-0/+6
Chip markings: N51822 / QFACA1 / 1513AN Change-Id: Idb7fc723850ea08b60b9f5c97a53f1ae8dfc8eb2 Signed-off-by: Peter A. Bigot <pab@pabigot.com> Reviewed-on: http://openocd.zylin.com/2936 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-09Kinetis: new devices K02, K26, K63, K64, K66, correct K21 and K22 variantsTomas Vanek1-14/+69
K22FN1M0 and K22FX512 has FTFE flash and old style SDID. K22FN128, 256 and 512 has FTFA flash and new style SDID K63 and K64 detects as K61 and K62, see Errata 1N83J e7534 Change-Id: I2aca6f1f18819bb2b2ec4982036510de444ad2ac Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2867 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Patrick Stewart <patstew@gmail.com>
2015-10-09Kinetis: give a reasonable default for max_flash_prog_sizeTomas Vanek1-5/+11
max_flash_prog_size euals to pflash_sector_size_bytes for most of devices. There is no point setting max_flash_prog_size for devices without FS_PROGRAM_SECTOR capability. Check for zero sector_size to avoid div by zero exception in case of device has FlexNVM but the driver does not define nvm_sector_size_bytes Change-Id: Iaf4e007fb1ec3d24c373350410e4bebe504a4c3e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2958 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Patrick Stewart <patstew@gmail.com>
2015-10-09Kinetis: Add K24 support and tidy upPatrick Stewart1-86/+135
The K24 uses the KL-style SDID register and has some flashing quirks, so the kinetis driver does not support it properly. Extend the chip detection routine to support the new SDID format. Add a parameter for the maximum flash size, as the K24 only supports 1k flashing blocks but has 4k sector size. Remove global 'granularity' array, as it's only really needed in one function. Replace 'klxx' with an enum showing which flash commands are actually supported on a given chip. Signed-off-by: Patrick Stewart <patstew@gmail.com> Change-Id: Ie244fab564d58c5cfe4fa36a025f0b2674ffad69 Reviewed-on: http://openocd.zylin.com/2864 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-09-30flash/nor/spi: Add Winbond w25q128fvAlex Forencich1-1/+2
Change-Id: I2e13c02361982468f41f218421ece9046bcc9a5f Signed-off-by: Alex Forencich <alex@alexforencich.com> Reviewed-on: http://openocd.zylin.com/2951 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30ADIv5: Fix typo in log messageEvan Hunter1-1/+1
Change-Id: I9c5e648566b1dd43cb55fd5e30edf8d5f0d189a6 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/2892 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30stlink_usb: fix typoJim Paris1-1/+1
Change-Id: I3cf5ced568319878b8bf40743e4c07718f630c68 Signed-off-by: Jim Paris <jim@jtan.com> Reviewed-on: http://openocd.zylin.com/2953 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30armv7m: Fix memory leak in register caching.Marc Schink3-1/+38
Change-Id: I184042d277a52f3940d6d6c13f3d94afc557933d Signed-off-by: Marc Schink <openocd-dev@marcschink.de> [andreas.fritiofson@gmail.com: don't check pointers before free()] Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2881 Tested-by: jenkins
2015-09-30numicro: Integrate Nuvoton NuMicro flash driver.Nemui Trinomius7-1291/+1943
Flash driver "mini51.c" and "nuc1x.c" are same target MCU. This patch integrates each driver and functions, and makes into new "NuMicro" flash driver. Change-Id: Ifff5c1cfdd265acca0f489631695be9194fa144c Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-on: http://openocd.zylin.com/2794 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30flash: Analog Devices ADuCM360 supportIvan Buliev4-0/+638
A target config and a simple flash driver for the ADuCM360 microcontroller. The EEPROM of the chip may be erased and programmed. Change-Id: Ic2bc2f91ec5b6f72e3976dbe18071f461fe503b8 Signed-off-by: Ivan Buliev <i.buliev@mikrosistemi.com> Reviewed-on: http://openocd.zylin.com/2787 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: jenkins
2015-09-30tcl/board: Add Parallella-I board configAndreas Färber1-0/+7
Tested with Porcupine-1 JTAG adapter board and Digilent JTAG-HS3 interface; reset does not yet work, pending nSRST configuration of the interface used. Change-Id: I0d0679e098d93ffbd1539004cdb900e2a8ae4a25 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2730 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30zynq_7000: Add expected IDAndreas Färber1-0/+1
As found on the Parallella-I board SKU A101020. Change-Id: Ie7e7a36325926d67fbe555b46a9be8a74fac8dba Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2729 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30tcl/interface/ftdi: Add Digilent JTAG-HS3 configAndreas Färber1-0/+13
Derived from tcl/interface/digilent-hs1.cfg. JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with PS_SRST_B on Xilinx Zynq SoC. Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2728 Tested-by: jenkins Reviewed-by: Robert Jordens <jordens@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30svf: fix segfaults exposed by some SVFPaul Fertser1-1/+14
The problem was reported by jstefanop on IRC, the SVF was generated with Xilinx ISE 14.7. Found and investigated with Valgrind's vgdb service. Change-Id: I32b0e77e0380ce4a391661f97449f9c2a5f83625 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2933 Tested-by: jenkins
2015-09-30tcl_server: Support line buffers up to 4M (v3)Philipp Wagner1-8/+43
Currently, the maximum size of a command sent to the TCL server is 4k. This patch increases this limit up to 4M. Reasoning: To get high-speed JTAG data transfers, I'm using a very long shift register. This reduces the overhead of the state changes, as well as the latency due to the common USB adapter transfers considerably. In order to submit those long DRSCAN commands to OpenOCD over the TCL/TCL interface, long TCL command lines are required. This is enabled by this patch. v3: Address review comments. Drop line instead of connection when realloc() fails. Changes in v2 of this patch: The line buffer is allocated dynamically to avoid an OpenOCD memory overhead if the large buffers are not used. The buffer starts at 4K and increases exponentially up to 1M, and then linearly in 1M increments up to 4M. Change-Id: Iecaef6a56ed5e18e9de4d912a514031ea78fa3bd Signed-off-by: Philipp Wagner <philipp.wagner@tum.de> Reviewed-on: http://openocd.zylin.com/2837 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-09-28server: remove connection limit from tcl and telnet serversAustin Morton4-5/+10
Add constant CONNECTION_LIMIT_UNLIMITED which indicates a service has no connection limit Change-Id: I008d31264010c25fa44ca74eb6d5740eca38bee1 Signed-off-by: Austin Morton <austinpmorton@gmail.com> Reviewed-on: http://openocd.zylin.com/2937 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
generated by cgit v1.1 at 2024-09-28 03:26:58 +0000