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2017-12-22Merge branch 'master' into updateTim Newsome109-906/+5299
Change-Id: Icec244b174cc0c67ab58961649a369db7f344824
2017-12-22Merge pull request #156 from riscv/fespiTim Newsome2-15/+20
fix fespi flash after registers were renamed.
2017-12-21Fix flash/run algorithm with new register namesTim Newsome2-5/+8
Change-Id: I8f539c880ee5da864956f56943411b228d8a5812
2017-12-21Make functions static. Free memory.Tim Newsome1-10/+12
Change-Id: Iadf7b2a926d6d5abc4c8daa2f5620886bcb09b31
2017-12-21Merge pull request #155 from riscv/debug_definesMegan Wachs1-22/+48
Update debug_defines to the one used with spike.
2017-12-21Merge pull request #148 from riscv/macbuildMegan Wachs1-1/+1
Use %ll instead of %L in scanf.
2017-12-21Update debug_defines to the one used with spike.Tim Newsome1-22/+48
Change-Id: I627c6ee557d98239227324c33f9b89f6280cbf93
2017-12-21Merge pull request #145 from riscv/rbb_winTim Newsome3-8/+40
Fix Windows build
2017-12-21Merge pull request #151 from riscv/use_parenTim Newsome1-1/+1
Use parens after if.
2017-12-21Use parens after if.Tim Newsome1-1/+1
I'm surprised this built with gcc before. Fixes Issue #150. Change-Id: I24d2957783c66ad53d5b532a4e930349a2059a97
2017-12-20config for ESPRESSObin from Globalscale Tech. Inc.Jiri Kastner1-0/+7
Change-Id: I77f536a9d2e901ebcef0a7dd0f205e5332b1d382 Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/4303 Tested-by: jenkins Reviewed-by: Forest Crossman <cyrozap@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-20configs for Marvell Armada 3700Jiri Kastner3-0/+78
Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd Signed-off-by: Jiri Kastner <cz172638@gmail.com> Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/4302 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-19Merge pull request #149 from riscv/xml_registersTim Newsome8-361/+583
Send gdb an XML target description that contains only a list of registers we think exist on this target
2017-12-19Add `riscv expose_csrs` command.Tim Newsome1-0/+110
This lets users tell OpenOCD which non-standard CSRs exist on their target, that will also be accessible and whose existence will be communicated to gdb. Change-Id: I56163a9fcb84ad7ebe815ae74fbd9fcc208f5a9d
2017-12-19Hide supervisor registers if there is no S mode.Tim Newsome2-28/+32
Also update encoding.h. Change-Id: I275be7de0aa1af64d13ea191b9f4ff391cfb16dc
2017-12-19Give FPRs ABI names.Tim Newsome2-2/+67
Change-Id: If198d10e16671b9868836e23386aaf8d4b05f317
2017-12-19Remove some debug printfs.Tim Newsome1-2/+0
Change-Id: I09989d4c0e102889ecb0eedbd3f4138f8b7bdb8c
2017-12-19Avoid another assertion failure.Tim Newsome1-1/+5
Change-Id: Ia54f778152974164697b712c360918e17a127d95
2017-12-19Read misa before using it to check for extensions.Tim Newsome1-1/+2
Change-Id: I7a172d83055d8bd833e3349a5b22b47dd5f31f5c
2017-12-19Don't rely on hart count until it's correct.Tim Newsome1-1/+1
Change-Id: I4e05eb091823b2e0fb481ca0b599072ba1ca70f2
2017-12-19Remove no-longer-true comment.Tim Newsome1-1/+0
Change-Id: I888680e73682582438a0de0496238867f1604754
2017-12-19Simplify examine()Tim Newsome1-43/+13
Now we don't have to play tricks fooling other parts of our code that might assert. Change-Id: Ia574378e1f95ed62d297e6b2e852245e58c9ffc9
2017-12-19Make priv register 8 bits.Tim Newsome1-0/+1
(It's really only 2 bits, but something wonky happens between gdb and OpenOCD if I make it that size.) Change-Id: I562a65cb0ebe5aa0edcc54c251d0fea0e26f9cb1
2017-12-19WIP xml register for 0.11.Tim Newsome4-392/+290
On HiFive1, FPRs show up with no name, and misa is 0x1105 instead of 0x40001105. Change-Id: I4ee223c905ad7d860147014e7b6394668658c6ea
2017-12-19Hide unknown registers, which probably don't existTim Newsome2-13/+21
Change-Id: Iffa8fa5ff4b0a01abd30fa302b7087e2011337bf
2017-12-19Fix register names.Tim Newsome5-46/+108
Use the ABI ones for every register that we have one for. Change-Id: I2a993abff416d2652dbe026b3fb498e144a5006f
2017-12-19WIP better CSR names, and include only existingTim Newsome1-1/+32
Change-Id: I1a234ee07c417ba56da10a61fc2bdbdcc60490a8
2017-12-19WIP. Hide FPRs if the hart doesn't support F/D.Tim Newsome2-23/+31
Change-Id: I988c0c36f2de8157d76874a697b3c054773b787d
2017-12-19`make all` debug tests now pass.Tim Newsome3-73/+106
Also properly support (I think) D extension on RV32. Change-Id: I2f0162d36e4c18c251f99b6943403cef30d17d29
2017-12-19Checkpoint that seems to work.Tim Newsome1-0/+30
Change-Id: I9599aacc256f6340795097732b6f8e8869c2099f
2017-12-15Use %ll instead of %L instead of scanf.macbuildTim Newsome1-1/+1
Mac build barfs on L, and the manpage says they're equivalent. Hopefully fixes #147 Change-Id: I3aa57775731f3f5ceb03097cae2a9dc6fd426dcd
2017-12-14Merge pull request #146 from riscv/scratch_ramTim Newsome1-1/+1
Fix cut and paste bug.
2017-12-14Fix cut and paste bug.Tim Newsome1-1/+1
Now reading 64-bit FPRs on 32-bit harts using scratch memory might work. Change-Id: Ie8c0fc689386c6e724ecab5e8c855e725fa8dd97
2017-12-14Use abstraction because Windows is not POSIXTim Newsome2-2/+13
Fixes #138 Change-Id: I4d9b49762e318fe91f1561ed315829b43daefef4
2017-12-14Add win32 build to travis.Tim Newsome1-6/+27
Change-Id: I8ce62ff321c6f3627d42fff13236f7fc9440d429
2017-12-12target: remove unused event definitionsTomas Vanek3-20/+0
Events reset-halt-pre, reset-halt-post, reset-wait-pre and reset-wait-post are not used anywhere. Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4285 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-12flash/nor/stm32f2x: fix erase on STM32F413/423Tomas Vanek1-4/+10
Theese devices do not have a gap in sector numbering. The driver translates sectors numbers 12 13... to 16 17... as used on dual bank flash devices. Therefore erase of sector 12 and above fails with error 'stm32x device protected' on F413/423. Drop sector number translation for devices without has_large_mem flag. Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4299 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12flash/nor/stm32f2x: fix protection block size for F767 in dual bank modeTomas Vanek1-1/+2
A protection block comprises two adjacent sectors in dual bank mode. As there are 64 and 128kB sectors joined in blocks 2 and 8, block size should be computed as a sum of sector sizes. Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4271 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12doc: improve stm32 flash driver documentationSpencer Oliver1-16/+15
also remove legacy footnote as it adds no value. Change-Id: I3892acf244bd8fba6f844a5d82a66004e193a395 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/4309 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2017-12-12jtag: drivers: stlink: handle all versions with single configPaul Fertser31-93/+91
Extend HLA interface to allow multiple VID/PID pairs and use it to autodetect the connected stlink version. Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3961 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-11Merge pull request #143 from riscv/fmvTim Newsome1-2/+2
Fix build.
2017-12-11Fix build.Tim Newsome1-2/+2
Change-Id: I4e3a36fac77fefa271ae9facbaa990fa330501ae
2017-12-11Merge pull request #131 from riscv/small_progbufTim Newsome7-1018/+780
Support program buffers that are just 2 instructions large
2017-12-08config: stm32l01x and stm32l02x chips supportelmot1-2/+2
New low-end chips have only 2k of RAM, workarea size adjusted Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com> Reviewed-on: http://openocd.zylin.com/4308 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-07docs: add missing stm32 flash driver documentationSpencer Oliver1-0/+67
Change-Id: I433780646e6fdfd0c2527b4a68025946ccb79d8b Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/4307 Tested-by: jenkins Reviewed-by: <alexandre.torgue@st.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-07stm8 : new targetAke Rehnman10-1/+2567
New STM8 target based mostly on mips4k. Target communication through STLINK/SWIM. No flash driver yet but it is still possible to program flash through load_image command. The usual target debug methods are implemented. Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/3953 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-06Add STM32H7 config filesAlexandre Torgue4-0/+123
Add 2 target files: -stm32h7x.cfg -stm32h7x_dual_bank.cfg Add 2 config files for: -STM32H743zi-nucleo bord -STM32H743i and STM32H753i eval boards. Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703 Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-on: http://openocd.zylin.com/4182 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06flash: Add new stm32h7x driver supportAlexandre Torgue5-0/+1334
Add basic support for: -STM32H7x (Embedded flash 2M) Erase and write tested on stm32h743. Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-on: http://openocd.zylin.com/4181 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabledBas Vermeulen1-5/+8
The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG, and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an error (and doesn't actually do anything in the debugger). Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for swd_mode, to make sure initialisation doesn't fail needlessly. Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9 Signed-off-by: Bas Vermeulen <bas@daedalean.ai> Reviewed-on: http://openocd.zylin.com/4294 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2017-12-06spi: add n25q256 flashRobert Jordens1-48/+50
* 256 MBit SPI flash * https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs * used e.g. on Xilinx KCU105 Change-Id: I18b19292b4869627adb9071266271962fec68fb4 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4186 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.1 at 2024-10-13 01:27:15 +0000