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2017-05-08stm32l4: support flashing L45x/46x devicesJuha Niskanen2-8/+19
Also fixes incorrect comment about MSI range. Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451 Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> Reviewed-on: http://openocd.zylin.com/4122 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, use scan32 function for reading impcode/idcode.Salvador Arroyo3-60/+19
There is no need to implement scan code in functions mips_ejtag_get_idcode/impcode(), use mips_ejtag_drscan_32(). Impcode/idcode saved in ejtag.info. Reorder the code in the callers of this functions. Change-Id: Ia829c783a0b24c6a65cade736113fa6f67b0a170 Signed-off-by: Salvador Arroyo <salvador@telecable.es> Reviewed-on: http://openocd.zylin.com/4003 Tested-by: jenkins Reviewed-by: Peter Mamonov <pmamonov@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32: add micromips breakpoints supportSalvador Arroyo1-46/+105
Breakpoint setting based on length (kind) only. Added 16bit aligned 32bit software breakpoints support and same filtering before setting breakpoint. Set the required isa bit in hardware breakpoints. Drop the isa bit in software breakpoints. Change-Id: I7020f27be16015194b76f385d9b8e5af496d0dfc Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4124 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32: add micromips isa handlingSalvador Arroyo5-19/+91
Read and save configuration registers, up to 4. Config3 holds the micromips implementation info. Added isa implementation info to mips32_common. Added isa filter to avoid common mistakes, but only if one isa mode is implemented. When resuming the isa requested is set if more than one isa mode is implemented. Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4123 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, convert miniprograms with code definitionSalvador Arroyo1-44/+63
Needed to run in micromips mode. Seems that if an isa is supported in debug mode it also supported in kernel mode. The contrary is not true. Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4033 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, add support for micromips in debug modeSalvador Arroyo8-270/+374
Micromips is 16bit oriented, branch and jumps are 16 bit based. The upper half 16bits of a 32bit instruction with the major opcode, must go first in the instruction stream, hence the SWAP16 macro and swap16 array function, needed if the code is written as 32 bit word in little endian cores. Endianess info added to ejtag_iinfo. Pointer to ejtag_info and isa field added to pracc context. MIPS32 code are renamed to MIPS32_ISA_... To select the isa, the new code has an additional isa parameter (1 for micromips, 0 for mips32). In JR instruction the isa bit must be set to execute micromips code. The suffix u is added to the OP codes to avoid signed/unsigned comparison errors and to make sure the right shift is performed logically. The isa in debug mode is updated in the poll function. Code for miniprograms, in kernel mode, need to be converted. CFI code only for mips32. Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4032 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, add microMips instruction subsetSalvador Arroyo1-0/+95
Only reencoded MIPS32 instructions. Added some instructions for crc code. Micromips isa in debug mode is only needed for pic32mm cores. Pic32mz seems that only works with MIPS32 isa when in debug mode. Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4022 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, add option to avoid check in last instructionSalvador Arroyo3-33/+36
This option is needed, for example, when exiting debug mode in bmips targets. The last instruction is a NOP, not a DERET. When working in async mode this check is not done, mips32_pracc_queue_exec() pass the parameter to mips32_pracc_exec() and never use it. Change-Id: I4c7ed4feb1588b62e2645b955b501b6671113b36 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4021 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, add realloc codeSalvador Arroyo3-44/+35
If max_code is reached realloc memory. If fails to realloc the error is propagated and every call to pracc_add() returns immediately. The exec function logs the error. Change-Id: Idd4ed9d9b8b19b7d6842d0bc5ebb05f943726705 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4020 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, change in pracc_list for dynamic allocationSalvador Arroyo3-44/+45
pracc_list points to an array with code in the lower half and addr in the upper half. Change it to a struct with an instruction field and an address field. Requiered to make reallocation easier. As a side effect the code is less quirky. Change-Id: Ibf904a33a2f35a7f69284d2a2114f4b4ae79219f Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4019 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-05 Avoid accessing null target->reg_cacheMegan Wachs1-0/+6
GDB might request registers even if target was not successfully initialized.
2017-05-05Merge pull request #43 from riscv/read-from-0Megan Wachs1-4/+4
Read from 0
2017-05-02Fix compile failure on MacOSXMatthias Welwarsky2-7/+3
MacOSX tool chain defines __unused in "sys/cdefs.h", causing a collision. Remove the local define to avoid polluting the compilers internal symbol namespace. Change-Id: I16370c4518e6aeec482dd689e7db80628f846ee3 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4118 Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2017-05-01riscv-013: more consistent parensMegan Wachs1-2/+2
2017-05-01riscv-013: Correct sign extension of address on read_memory for lower bits ↵Megan Wachs1-1/+1
as well
2017-05-01riscv-013: Correct sign extension of address on read_memoryMegan Wachs1-2/+2
2017-05-01Correct debugging print in read_memoryMegan Wachs1-1/+1
2017-05-01Fix an assertion when reading from 0Palmer Dabbelt1-1/+1
2017-05-01Correct previous hart caching logicPalmer Dabbelt1-1/+2
2017-04-27Clean up unused read_memory codePalmer Dabbelt1-31/+0
2017-04-26Correct an off-by-one in argument parsingPalmer Dabbelt1-1/+1
2017-04-26Keep calling the old poll on v0.11 targetsPalmer Dabbelt1-2/+11
This is another thing that should be fixed correctly. Essentially this just uses the old codepath, which works for v0.11.
2017-04-26Initialize all registers in examinePalmer Dabbelt1-0/+3
I'm not sure why this is necessary, but for some reason GDB is asking for registers before OpenOCD thinks there's been a halt. This is really just a workaround, but I need to refactor the v0.11 stuff anyway so I don't want to figure it out.
2017-04-26riscv: Fix some blocking compile warningsMegan Wachs2-5/+7
2017-04-26fespi: Allow the ctrl_base address specified as a parameterMegan Wachs1-14/+25
2017-04-26Add 64-bit and multihart supportPalmer Dabbelt22-1451/+3210
This is a major rewrite of the RISC-V v0.13 OpenOCD port. This shouldn't have any meaningful effect on the v0.11 support, but it does add generic versions of many functions that will allow me to later refactor the v0.11 support so it's easier to maintain both ports. This started as an emergency feature branch and went on for a long time, so it's all been squashed down into one commit so there isn't a big set of broken commits lying around. The changes are: * You can pass "-rtos riscv" to the target in OpenOCD's configuration file, which enables multi-hart mode. This uses OpenOCD's RTOS support to control all the harts from the debug module using commands like "info threads" in GDB. This support is still expermental. * There is support for RV64I, but due to OpenOCD limitations we only support 32-bit physical addresses. I hope to remedy this by rebasing onto the latest OpenOCD release, which I've heard should fix this. * This matches the latest draft version of the RISC-V debug spec, as of April 26th. This version fixes a number of spec bugs and should be close to the final debug spec.
2017-04-25mips32, write handler code in a more compact waySalvador Arroyo1-29/+17
Less code and probably cleaner. Don't check if it is ever ERROR_OK. Change-Id: I1045b58fd4542ec24430332f49679364ae97b1dc Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4018 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25mips32, implement assembler li instructionSalvador Arroyo1-37/+27
Implement it as a function, the code was already in. Added optimize option. Change-Id: Ib9ad3f00d6c4f0b91c4e4960a50ec8d102f4e333 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4017 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25mips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrlSalvador Arroyo1-20/+14
Makes code shorter In fasdata transfer fuction declare variables locally. Avoid cast. Change-Id: I0367b66339560fc20521a0598488e7ff9076808e Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4011 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25mips32, mips32_pracc_finish() queued onlySalvador Arroyo1-19/+8
In most of the cases there is no need to request execution, the check for a new pracc access already does it. Requesting execution if not needed makes execution slower and code larger due the additional checks. Reduce code in fasdata transfer function. Call for execution when exiting debug. Change-Id: I3b45f6d1f62da5fad3e3db84f82a9299b16e1bd9 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4010 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25mips32, drop unnecessary code in mips32_pracc.cSalvador Arroyo1-60/+12
Struct mips32_pracc_context no more in use. In current code cp0 reg/sel do not requires special handling. In sync mode ctx.store_count not used, drop check. In fasdata transfer function use mips32_pracc_read_ctrl_addr() to reduce code. Change-Id: Ibd4cfa5a44ebc106ed0db042f4e54a2e0b3d43cb Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4007 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25mips32, homogenize code in the scan functionsSalvador Arroyo2-19/+17
Change-Id: I32fed3332857737048dd12da94fcaba140acb726 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4006 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25server/telnet: Remove exit() callMarc Schink1-1/+1
Change-Id: I8ce99d7d62dfe3cad63cf6bc68f2faf2234e395c Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3224 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25server/server: Remove all exit() callsMarc Schink3-23/+52
With this patch OpenOCD shuts down properly when errors occur in the server instead of just calling exit(). Change-Id: I2ae1a6153dafc88667951cab9152941cb487be85 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3223 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2017-04-25stm32l4: support flashing L496 devicesJuha Niskanen1-1/+6
Change-Id: I3effc5b675c853433170391c5eaf46edc067b6e7 Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> Reviewed-on: http://openocd.zylin.com/4108 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24mips32, add generic scan 32 functionSalvador Arroyo1-29/+19
Will be used later, allow queuing all needed scans in a pracc access. This makes faster execution with ftdi based adapters working in sync with pracc. Added now because the overall code is shorter. Change-Id: Ib32b89307b75785f88870db8d7c9255dc5bbd426 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4005 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24mips32, pic32 use uint8_t in 8 bit scan functionSalvador Arroyo3-17/+9
Makes code shorter. Change-Id: I6cc01adffbea063ccb071ddf3a3e3d81727b29ce Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4004 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24tcl/board: Add STMicroelectronics STM32F7 Nucleo configMarc Schink1-0/+10
Tested with STM32F746ZG Nucleo development board. Change-Id: Ia97b774b996a3be03e8e84342b93659c3632c18f Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3516 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24udev: Add rules for Ambiq Micro EVK's.Karl Palsson1-0/+5
Udev rules for Ambiq Micro ftdi based EVK's. Two new vid:pid's: 2AEC:6010, and 2AEC:6011. Udev rule for multi-target Debug board 2AEC:1106 Change-Id: Id7430d0c70647752375230f4024be9f7a2ba95ce Signed-off-by: Rick Foos <rfoos@solengtech.com> Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/3980 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24Added 512K flashing support for em3587Byron Kubert1-0/+5
The Silicon Labs EM3587 and EM3588 may have 512K of flash. This fix allows for 512K to be specifiied on the command line when flashing a device. Change-Id: I18cc4bd0d14e1f2069066734a7396bcccf3de941 Signed-off-by: Byron Kubert <byronk@google.com> Reviewed-on: http://openocd.zylin.com/3795 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24libusb: Add transfer type filter to get correct epHellosun Wu6-7/+17
The need for this due to AICE having 3 interfaces (EP1 IN-Interrupt, EP2 OUT-Bulk, EP6 IN-Bulk). Without it, the function will choose first two endpoint as read_ep/write_ep. This filter will check transfer types when get endpoint-id. Without this patch, AICE will not get correct endpoint. Change-Id: I4da93c7de41cd19e5095b4bfb42078b21f40b678 Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com> Reviewed-on: http://openocd.zylin.com/3218 Tested-by: jenkins Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24flash/nor/tcl: Make verify_bank parameter optionalMarc Schink2-8/+18
Make the 'offset' parameter optional, if omitted simply start at the beginning of the flash bank. Additionally, check if the argument is out of bounds of the flash bank. Change-Id: Id1959eee5c395666c35f26342c3c50134dd564e5 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3858 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-24flash/nor/tcl: Fix some format specifiersMarc Schink1-10/+9
Change-Id: I2255aede9713cb7ef538d7433dd900d8da7a51ad Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3857 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073Jan Čapek2-0/+17
- stm32l0_dual_bank.cfg - implement dual bank configuration - st_nucleo_l073rz.cfg - implement new board script Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7 Signed-off-by: Jan Čapek <jan.capek@braiins.cz> Reviewed-on: http://openocd.zylin.com/3957 Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com> Reviewed-by: Karl Palsson <karlp@tweak.net.au> Tested-by: jenkins Reviewed-by: Aurelio Lucchesi <me@0rel.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devicesCezaryGapinski1-50/+69
Default values for .first_bank_size_kb and .has_dual_banks fields described in stm32lx_parts[] do not fully describe the real device memory layouts. Basing on: STM32L0x1 RM0377 STM32L0x2 RM0376 STM32L0x3 RM0367 STM32Lxxxx RM0038 correct values for memory layouts were selected: id = 0x447 STM32L0xx (Cat.5) <- dual bank flash for size 192 or 128 KBytes, single bank for 64 KBytes id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + / High Density) <- only one size of the bank, default values are correct id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank, but size of the bank can be different For that reason .part_info field in struct stm32lx_flash_bank is a dynamic field with fields copied from stm32lx_parts[] and overwriten to correct values for specific chips and memory sizes. Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147 Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com> Reviewed-on: http://openocd.zylin.com/4074 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-04-24Fix flash writing on stm32l0Armin van der Togt2-30/+18
Fix "couldn't use loader, falling back to page memory writes" error on stm32l0 which was caused by the use of cortex-m3 instructions in the flash loader code. The loader is rewritten using cortex-m0 compatible instructions Signed-off-by: Armin van der Togt <armin@otheruse.nl> Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e Reviewed-on: http://openocd.zylin.com/4036 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24flash/nor/at91samd: fix chip erase of a secured deviceTomas Vanek1-4/+10
'at91samd chip-erase' command did not work on secured device. Fix it changing address of DSU.CTRL register (see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection). While on it check error return of DSU.CTRL write. Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reported-by: Thomas Irmen <tirmen@gmx.net> Reviewed-on: http://openocd.zylin.com/4043 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24jtag/drivers cmsis-dap: do not limit speed so strictlyTomas Vanek1-5/+3
Adapter clock frequency is set by 32-bit number and most adapters limit the highest speed safely. There is no reason to impose strict limit of 5000 kHz if some adapters can do more. While on it give informative error message in case of zero adapter_khz. Change-Id: I45c9804678e24496ea769ea9ca6036701b04dde9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3945 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24Add support for the ATMEL SAM G55 Xplained Pro board and CPU.Jerome Lambourg2-0/+81
Change-Id: Iffe59dcf9f2cb1f5949c37d11fe0d2141a47f8da Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3922 Tested-by: jenkins Reviewed-by: Leo Zhang <liang.zhang@microchip.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23help/log.c: better error handling for "log_output"Girts1-3/+9
* Close previous log file if one was opened before. * Return error if opening file fails. Change-Id: I103025cd86bcac785fe39e13bc7d5f79d78e38e7 Signed-off-by: Girts Folkmanis <opensource@girts.me> Reviewed-on: http://openocd.zylin.com/3878 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
generated by cgit v1.1 at 2024-10-12 16:32:22 +0000