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+#
+# Novena open hardware and F/OSS-friendly computing platform
+#
+# Design documentation:
+# http://www.kosagi.com/w/index.php?title=Novena_PVT_Design_Source
+#
+# +-------------+--------------+------+-------+---------+
+# | Pad name | Schematic | GPIO | sysfs | JTAG |
+# +-------------+--------------+------+-------+---------+
+# | DISP0_DAT13 | FPGA_RESET_N | 5-07 | 135 | RESET_N |
+# | DISP0_DAT14 | FPGA_TCK | 5-08 | 136 | TCK |
+# | DISP0_DAT15 | FPGA_TDI | 5-09 | 137 | TDI |
+# | DISP0_DAT16 | FPGA_TDO | 5-10 | 138 | TDO |
+# | DISP0_DAT17 | FPGA_TMS | 5-11 | 139 | TMS |
+# +-------------+--------------+------+-------+---------+
+
+interface sysfsgpio
+
+transport select jtag
+
+# TCK TMS TDI TDO
+sysfsgpio_jtag_nums 136 139 137 138
+
+source [find cpld/xilinx-xc6s.cfg]
+