diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index ba495cc..6321bf7 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -10649,6 +10649,16 @@ $_TARGETNAME expose_custom 32=myregister @end example @end deffn +@deffn {Command} {riscv info} +Displays some information OpenOCD detected about the target. +@end deffn + +@deffn {Command} {riscv reset_delays} [wait] +OpenOCD learns how many Run-Test/Idle cycles are required between scans to avoid +encountering the target being busy. This command resets those learned values +after `wait` scans. It's only useful for testing OpenOCD itself. +@end deffn + @deffn {Command} {riscv set_command_timeout_sec} [seconds] Set the wall-clock timeout (in seconds) for individual commands. The default should work fine for all but the slowest targets (eg. simulators). @@ -10659,12 +10669,7 @@ Set the maximum time to wait for a hart to come out of reset after reset is deasserted. @end deffn -@deffn {Command} {riscv set_scratch_ram} none|[address] -Set the address of 16 bytes of scratch RAM the debugger can use, or 'none'. -This is used to access 64-bit floating point registers on 32-bit targets. -@end deffn - -@deffn Command {riscv set_mem_access} method1 [method2] [method3] +@deffn {Command} {riscv set_mem_access} method1 [method2] [method3] Specify which RISC-V memory access method(s) shall be used, and in which order of priority. At least one method must be specified. |