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-rw-r--r--src/target/espressif/esp32.c4
-rw-r--r--src/target/espressif/esp32s2.c2
-rw-r--r--src/target/espressif/esp32s3.c2
-rw-r--r--src/target/espressif/esp_semihosting.c4
-rw-r--r--src/target/xtensa/xtensa.c8
-rw-r--r--src/target/xtensa/xtensa_chip.c4
6 files changed, 12 insertions, 12 deletions
diff --git a/src/target/espressif/esp32.c b/src/target/espressif/esp32.c
index 8ad8bad..9f36ca5 100644
--- a/src/target/espressif/esp32.c
+++ b/src/target/espressif/esp32.c
@@ -101,7 +101,7 @@ static inline struct esp32_common *target_to_esp32(struct target *target)
* 6. restore initial PC and the contents of ESP32_SMP_RTC_DATA_LOW
* TODO: some state of RTC_CNTL is not reset during SW_SYS_RST. Need to reset that manually. */
-const uint8_t esp32_reset_stub_code[] = {
+static const uint8_t esp32_reset_stub_code[] = {
#include "../../../contrib/loaders/reset/espressif/esp32/cpu_reset_handler_code.inc"
};
@@ -365,7 +365,7 @@ static int esp32_target_create(struct target *target, Jim_Interp *interp)
return ERROR_OK;
}
-COMMAND_HELPER(esp32_cmd_flashbootstrap_do, struct esp32_common *esp32)
+static COMMAND_HELPER(esp32_cmd_flashbootstrap_do, struct esp32_common *esp32)
{
int state = -1;
diff --git a/src/target/espressif/esp32s2.c b/src/target/espressif/esp32s2.c
index 4aef379..089534c 100644
--- a/src/target/espressif/esp32s2.c
+++ b/src/target/espressif/esp32s2.c
@@ -122,7 +122,7 @@ static int esp32s2_deassert_reset(struct target *target)
return ERROR_OK;
}
-int esp32s2_soft_reset_halt(struct target *target)
+static int esp32s2_soft_reset_halt(struct target *target)
{
LOG_TARGET_DEBUG(target, "begin");
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c
index 0da8552..5826795 100644
--- a/src/target/espressif/esp32s3.c
+++ b/src/target/espressif/esp32s3.c
@@ -96,7 +96,7 @@ struct esp32s3_common {
* PRO CPU is halted, APP CPU is in reset.
*/
-const uint8_t esp32s3_reset_stub_code[] = {
+static const uint8_t esp32s3_reset_stub_code[] = {
#include "../../../contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc"
};
diff --git a/src/target/espressif/esp_semihosting.c b/src/target/espressif/esp_semihosting.c
index b1edef3..f9e8b02 100644
--- a/src/target/espressif/esp_semihosting.c
+++ b/src/target/espressif/esp_semihosting.c
@@ -15,7 +15,7 @@
#include "esp_semihosting.h"
#include "esp_xtensa.h"
-struct esp_semihost_data *target_to_esp_semihost_data(struct target *target)
+static struct esp_semihost_data __attribute__((unused)) *target_to_esp_semihost_data(struct target *target)
{
const char *arch = target_get_gdb_arch(target);
if (arch) {
@@ -27,7 +27,7 @@ struct esp_semihost_data *target_to_esp_semihost_data(struct target *target)
return NULL;
}
-int esp_semihosting_sys_seek(struct target *target, uint64_t fd, uint32_t pos, size_t whence)
+static int esp_semihosting_sys_seek(struct target *target, uint64_t fd, uint32_t pos, size_t whence)
{
struct semihosting *semihosting = target->semihosting;
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 2e978b3..a6e50cc 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -300,7 +300,7 @@ union xtensa_reg_val_u {
uint8_t buf[4];
};
-const struct xtensa_keyval_info_s xt_qerr[XT_QERR_NUM] = {
+static const struct xtensa_keyval_info_s xt_qerr[XT_QERR_NUM] = {
{ .chrval = "E00", .intval = ERROR_FAIL },
{ .chrval = "E01", .intval = ERROR_FAIL },
{ .chrval = "E02", .intval = ERROR_COMMAND_ARGUMENT_INVALID },
@@ -519,7 +519,7 @@ static int xtensa_queue_pwr_reg_write(struct xtensa *xtensa, unsigned int reg, u
}
/* NOTE: Assumes A3 has already been saved */
-int xtensa_window_state_save(struct target *target, uint32_t *woe)
+static int xtensa_window_state_save(struct target *target, uint32_t *woe)
{
struct xtensa *xtensa = target_to_xtensa(target);
int woe_dis;
@@ -547,7 +547,7 @@ int xtensa_window_state_save(struct target *target, uint32_t *woe)
}
/* NOTE: Assumes A3 has already been saved */
-void xtensa_window_state_restore(struct target *target, uint32_t woe)
+static void xtensa_window_state_restore(struct target *target, uint32_t woe)
{
struct xtensa *xtensa = target_to_xtensa(target);
if (xtensa->core_config->windowed) {
@@ -2983,7 +2983,7 @@ const char *xtensa_get_gdb_arch(struct target *target)
}
/* exe <ascii-encoded hexadecimal instruction bytes> */
-COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
+static COMMAND_HELPER(xtensa_cmd_exe_do, struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
diff --git a/src/target/xtensa/xtensa_chip.c b/src/target/xtensa/xtensa_chip.c
index c609245..6e19313 100644
--- a/src/target/xtensa/xtensa_chip.c
+++ b/src/target/xtensa/xtensa_chip.c
@@ -120,7 +120,7 @@ static int xtensa_chip_target_create(struct target *target, Jim_Interp *interp)
return ERROR_OK;
}
-void xtensa_chip_target_deinit(struct target *target)
+static void xtensa_chip_target_deinit(struct target *target)
{
struct xtensa *xtensa = target_to_xtensa(target);
xtensa_target_deinit(target);
@@ -136,7 +136,7 @@ static int xtensa_chip_examine(struct target *target)
return retval;
}
-int xtensa_chip_jim_configure(struct target *target, struct jim_getopt_info *goi)
+static int xtensa_chip_jim_configure(struct target *target, struct jim_getopt_info *goi)
{
static bool dap_configured;
int ret = adiv5_jim_configure(target, goi);