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-rw-r--r--tcl/target/k40.cfg38
-rw-r--r--tcl/target/k60.cfg38
-rw-r--r--tcl/target/kl25.cfg69
-rw-r--r--tcl/target/kl46.cfg48
-rw-r--r--tcl/target/klx.cfg62
-rw-r--r--tcl/target/kx.cfg41
6 files changed, 111 insertions, 185 deletions
diff --git a/tcl/target/k40.cfg b/tcl/target/k40.cfg
index b0f6994..9811611 100644
--- a/tcl/target/k40.cfg
+++ b/tcl/target/k40.cfg
@@ -2,39 +2,5 @@
# Freescale Kinetis K40 devices
#
-#
-# K40 devices support both JTAG and SWD transports.
-#
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME k40
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x4ba00477
-}
-
-set _TARGETNAME $_CHIPNAME.cpu
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
-
-reset_config srst_nogate
-
-if {![using_hla]} {
- # if srst is not fitted use SYSRESETREQ to
- # perform a soft reset
- cortex_m reset_config sysresetreq
-}
+set CHIPNAME k40
+source [find target/kx.cfg]
diff --git a/tcl/target/k60.cfg b/tcl/target/k60.cfg
index 0e7adc4..b9c5e3a 100644
--- a/tcl/target/k60.cfg
+++ b/tcl/target/k60.cfg
@@ -2,39 +2,5 @@
# Freescale Kinetis K60 devices
#
-#
-# K60 devices support both JTAG and SWD transports.
-#
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME k60
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x4ba00477
-}
-
-set _TARGETNAME $_CHIPNAME.cpu
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
-
-reset_config srst_nogate
-
-if {![using_hla]} {
- # if srst is not fitted use SYSRESETREQ to
- # perform a soft reset
- cortex_m reset_config sysresetreq
-}
+set CHIPNAME k60
+source [find target/kx.cfg]
diff --git a/tcl/target/kl25.cfg b/tcl/target/kl25.cfg
index b75e0a5..0e716e3 100644
--- a/tcl/target/kl25.cfg
+++ b/tcl/target/kl25.cfg
@@ -2,70 +2,5 @@
# Freescale Kinetis KL25 devices
#
-#
-# KL25 devices support both JTAG and SWD transports.
-#
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME kl25
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 4kB
-if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
-} else {
- set _WORKAREASIZE 0x1000
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x0bc11477
-}
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_CHIPNAME.cpu
-
-# It is important that "kinetis mdm check_security" is called for
-# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
-# causes "kinetis mdm check_security" to fail the first time openocd
-# calls it when it tries to connect after the CPU has been power-cycled.
-$_CHIPNAME.cpu configure -event examine-end {
- kinetis mdm check_security
-}
-
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
-
-# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
-# specifies up to 1MHz for VLPR mode.
-adapter_khz 1000
-
-reset_config srst_nogate
-
-if {![using_hla]} {
- # if srst is not fitted use SYSRESETREQ to
- # perform a soft reset
- cortex_m reset_config sysresetreq
-}
-
-$_TARGETNAME configure -event reset-init {
- # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
- # specifies up to 24MHz for run mode; Table 17 of Sub-Family Data
- # Sheet rev4 lists 25MHz as the maximum frequency.
- adapter_khz 24000
-}
+set CHIPNAME kl25
+source [find target/klx.cfg]
diff --git a/tcl/target/kl46.cfg b/tcl/target/kl46.cfg
index 074f26a..70ea273 100644
--- a/tcl/target/kl46.cfg
+++ b/tcl/target/kl46.cfg
@@ -2,49 +2,5 @@
# Freescale Kinetis KL46 devices
#
-#
-# KL46 devices supports SWD transport only.
-#
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME kl46
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 4kB
-if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
-} else {
- set _WORKAREASIZE 0x1000
-}
-
-if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x0bc11477
-}
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_CHIPNAME.cpu
-
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
-
-if {![using_hla]} {
- # if srst is not fitted use SYSRESETREQ to
- # perform a soft reset
- cortex_m reset_config sysresetreq
-}
+set CHIPNAME kl46
+source [find target/klx.cfg]
diff --git a/tcl/target/klx.cfg b/tcl/target/klx.cfg
new file mode 100644
index 0000000..d2d2c28
--- /dev/null
+++ b/tcl/target/klx.cfg
@@ -0,0 +1,62 @@
+#
+# Freescale Kinetis KL series devices
+#
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME klx
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 4kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x0bc11477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
+
+# It is important that "kinetis mdm check_security" is called for
+# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
+# causes "kinetis mdm check_security" to fail the first time openocd
+# calls it when it tries to connect after the CPU has been power-cycled.
+$_CHIPNAME.cpu configure -event examine-end {
+ kinetis mdm check_security
+}
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
+
+# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
+# specifies up to 1MHz for VLPR mode.
+adapter_khz 1000
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
+
+$_TARGETNAME configure -event reset-init {
+ # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
+ # specifies up to 24MHz for run mode; Table 17 of Sub-Family Data
+ # Sheet rev4 lists 25MHz as the maximum frequency.
+ adapter_khz 24000
+}
diff --git a/tcl/target/kx.cfg b/tcl/target/kx.cfg
new file mode 100644
index 0000000..93b2b58
--- /dev/null
+++ b/tcl/target/kx.cfg
@@ -0,0 +1,41 @@
+#
+# Freescale Kinetis Kx series devices
+#
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME kx
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID 0x2ba01477
+ }
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
generated by cgit v1.1 at 2024-08-05 01:14:34 +0000