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-rw-r--r--doc/openocd.texi12
-rw-r--r--src/pld/certus.c24
-rw-r--r--src/pld/certus.h1
-rw-r--r--src/pld/ecp2_3.c11
-rw-r--r--src/pld/ecp2_3.h1
-rw-r--r--src/pld/ecp5.c24
-rw-r--r--src/pld/ecp5.h1
-rw-r--r--src/pld/gowin.c4
-rw-r--r--src/pld/lattice.c35
-rw-r--r--src/pld/lattice_cmd.h1
-rw-r--r--src/pld/virtex2.c8
11 files changed, 112 insertions, 10 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 7ad48c8..2d59238 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8764,8 +8764,8 @@ Change values for boundary scan instructions selecting the registers USER1 to US
Description of the arguments can be found at command @command{virtex2 set_instr_codes}.
@end deffn
-@deffn {Command} {virtex2 program} pld_name
-Load the bitstream from external memory for FPGA @var{pld_name}. A.k.a. refresh.
+@deffn {Command} {virtex2 refresh} pld_name
+Load the bitstream from external memory for FPGA @var{pld_name}. A.k.a. program.
@end deffn
@end deffn
@@ -8796,6 +8796,10 @@ for FPGA @var{pld_name} with value @var{val}.
Set the length of the register for the preload. This is needed when the JTAG ID of the device is not known by openocd (newer NX devices).
The load command for the FPGA @var{pld_name} will use a length for the preload of @var{length}.
@end deffn
+
+@deffn {Command} {lattice refresh} pld_name
+Load the bitstream from external memory for FPGA @var{pld_name}. A.k.a program.
+@end deffn
@end deffn
@@ -8850,9 +8854,9 @@ Reads and displays the user register
for FPGA @var{pld_name}.
@end deffn
-@deffn {Command} {gowin reload} pld_name
+@deffn {Command} {gowin refresh} pld_name
Load the bitstream from external memory for
-FPGA @var{pld_name}. A.k.a. refresh.
+FPGA @var{pld_name}. A.k.a. reload.
@end deffn
@end deffn
diff --git a/src/pld/certus.c b/src/pld/certus.c
index 8bfdff4..a49501f 100644
--- a/src/pld/certus.c
+++ b/src/pld/certus.c
@@ -304,3 +304,27 @@ int lattice_certus_get_facing_read_bits(struct lattice_pld_device *pld_device_in
return ERROR_OK;
}
+
+int lattice_certus_refresh(struct lattice_pld_device *lattice_device)
+{
+ struct jtag_tap *tap = lattice_device->tap;
+ if (!tap)
+ return ERROR_FAIL;
+
+ int retval = lattice_preload(lattice_device);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = lattice_set_instr(tap, LSC_REFRESH, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ jtag_add_runtest(2, TAP_IDLE);
+ jtag_add_sleep(200000);
+ retval = lattice_set_instr(tap, BYPASS, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ jtag_add_runtest(100, TAP_IDLE);
+ jtag_add_sleep(1000);
+
+ return jtag_execute_queue();
+}
diff --git a/src/pld/certus.h b/src/pld/certus.h
index d21ad61..0fbfdef 100644
--- a/src/pld/certus.h
+++ b/src/pld/certus.h
@@ -17,5 +17,6 @@ int lattice_certus_load(struct lattice_pld_device *lattice_device, struct lattic
int lattice_certus_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info);
int lattice_certus_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info);
int lattice_certus_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits);
+int lattice_certus_refresh(struct lattice_pld_device *lattice_device);
#endif /* OPENOCD_PLD_CERTUS_H */
diff --git a/src/pld/ecp2_3.c b/src/pld/ecp2_3.c
index a7b7580..5dfea9a 100644
--- a/src/pld/ecp2_3.c
+++ b/src/pld/ecp2_3.c
@@ -304,3 +304,14 @@ int lattice_ecp2_3_get_facing_read_bits(struct lattice_pld_device *pld_device_in
return ERROR_OK;
}
+
+int lattice_ecp2_3_refresh(struct lattice_pld_device *lattice_device)
+{
+ if (!lattice_device || !lattice_device->tap)
+ return ERROR_FAIL;
+
+ int retval = lattice_set_instr(lattice_device->tap, LSCC_REFRESH, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ return jtag_execute_queue();
+}
diff --git a/src/pld/ecp2_3.h b/src/pld/ecp2_3.h
index c5dec56..d3f7464 100644
--- a/src/pld/ecp2_3.h
+++ b/src/pld/ecp2_3.h
@@ -18,5 +18,6 @@ int lattice_ecp3_load(struct lattice_pld_device *lattice_device, struct lattice_
int lattice_ecp2_3_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info);
int lattice_ecp2_3_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info);
int lattice_ecp2_3_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits);
+int lattice_ecp2_3_refresh(struct lattice_pld_device *lattice_device);
#endif /* OPENOCD_PLD_ECP2_3_H */
diff --git a/src/pld/ecp5.c b/src/pld/ecp5.c
index 024fe2b..f8ba33e 100644
--- a/src/pld/ecp5.c
+++ b/src/pld/ecp5.c
@@ -276,3 +276,27 @@ int lattice_ecp5_get_facing_read_bits(struct lattice_pld_device *pld_device_info
return ERROR_OK;
}
+
+int lattice_ecp5_refresh(struct lattice_pld_device *lattice_device)
+{
+ struct jtag_tap *tap = lattice_device->tap;
+ if (!tap)
+ return ERROR_FAIL;
+
+ int retval = lattice_preload(lattice_device);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = lattice_set_instr(tap, LSC_REFRESH, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ jtag_add_runtest(2, TAP_IDLE);
+ jtag_add_sleep(200000);
+ retval = lattice_set_instr(tap, BYPASS, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ jtag_add_runtest(100, TAP_IDLE);
+ jtag_add_sleep(1000);
+
+ return jtag_execute_queue();
+}
diff --git a/src/pld/ecp5.h b/src/pld/ecp5.h
index daf481f..975678e 100644
--- a/src/pld/ecp5.h
+++ b/src/pld/ecp5.h
@@ -17,5 +17,6 @@ int lattice_ecp5_load(struct lattice_pld_device *lattice_device, struct lattice_
int lattice_ecp5_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info);
int lattice_ecp5_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info);
int lattice_ecp5_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits);
+int lattice_ecp5_refresh(struct lattice_pld_device *lattice_device);
#endif /* OPENOCD_PLD_ECP5_H */
diff --git a/src/pld/gowin.c b/src/pld/gowin.c
index c42b2f2..bbc2fe1 100644
--- a/src/pld/gowin.c
+++ b/src/pld/gowin.c
@@ -543,10 +543,10 @@ static const struct command_registration gowin_exec_command_handlers[] = {
.help = "reading user register from FPGA",
.usage = "pld_name",
}, {
- .name = "reload",
+ .name = "refresh",
.mode = COMMAND_EXEC,
.handler = gowin_reload_command_handler,
- .help = "reloading bitstream from flash to SRAM",
+ .help = "reload bitstream from flash to SRAM",
.usage = "pld_name",
},
COMMAND_REGISTRATION_DONE
diff --git a/src/pld/lattice.c b/src/pld/lattice.c
index 4858603..cd72d3c 100644
--- a/src/pld/lattice.c
+++ b/src/pld/lattice.c
@@ -575,6 +575,35 @@ COMMAND_HANDLER(lattice_read_status_command_handler)
return retval;
}
+COMMAND_HANDLER(lattice_refresh_command_handler)
+{
+ if (CMD_ARGC != 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct pld_device *device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
+ if (!device) {
+ command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
+ return ERROR_FAIL;
+ }
+
+ struct lattice_pld_device *lattice_device = device->driver_priv;
+ if (!lattice_device)
+ return ERROR_FAIL;
+
+ int retval = lattice_check_device_family(lattice_device);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (lattice_device->family == LATTICE_ECP2 || lattice_device->family == LATTICE_ECP3)
+ return lattice_ecp2_3_refresh(lattice_device);
+ else if (lattice_device->family == LATTICE_ECP5)
+ return lattice_ecp5_refresh(lattice_device);
+ else if (lattice_device->family == LATTICE_CERTUS)
+ return lattice_certus_refresh(lattice_device);
+
+ return ERROR_FAIL;
+}
+
static const struct command_registration lattice_exec_command_handlers[] = {
{
.name = "read_status",
@@ -600,6 +629,12 @@ static const struct command_registration lattice_exec_command_handlers[] = {
.handler = lattice_set_preload_command_handler,
.help = "set length for preload (device specific)",
.usage = "pld_name value",
+ }, {
+ .name = "refresh",
+ .mode = COMMAND_EXEC,
+ .handler = lattice_refresh_command_handler,
+ .help = "refresh from configuration memory",
+ .usage = "pld_name",
},
COMMAND_REGISTRATION_DONE
};
diff --git a/src/pld/lattice_cmd.h b/src/pld/lattice_cmd.h
index 389b7af..0c10625 100644
--- a/src/pld/lattice_cmd.h
+++ b/src/pld/lattice_cmd.h
@@ -13,6 +13,7 @@
#define PROGRAM_SPI 0x3A
#define LSC_READ_STATUS 0x3C
#define LSC_INIT_ADDRESS 0x46
+#define LSC_REFRESH 0x79
#define LSC_BITSTREAM_BURST 0x7A
#define READ_USERCODE 0xC0
#define ISC_ENABLE 0xC6
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index fce764c..3dff906 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -265,7 +265,7 @@ static int virtex2_load(struct pld_device *pld_device, const char *filename)
return retval;
}
-COMMAND_HANDLER(virtex2_handle_program_command)
+COMMAND_HANDLER(virtex2_handle_refresh_command)
{
struct pld_device *device;
@@ -449,10 +449,10 @@ static const struct command_registration virtex2_exec_command_handlers[] = {
.help = "set instructions codes used for jtag-hub",
.usage = "pld_name user1 [user2 [user3 [user4]]]",
}, {
- .name = "program",
+ .name = "refresh",
.mode = COMMAND_EXEC,
- .handler = virtex2_handle_program_command,
- .help = "start loading of configuration (refresh)",
+ .handler = virtex2_handle_refresh_command,
+ .help = "start loading of configuration (program)",
.usage = "pld_name",
},
COMMAND_REGISTRATION_DONE
generated by cgit v1.1 at 2024-09-18 10:57:47 +0000