diff options
| author | Bohdan Tymkiv <bhdt@cypress.com> | 2018-03-21 16:13:28 +0200 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2018-04-23 20:42:06 +0100 |
| commit | 4440bf1fcddce3501781496e2d6a9d0f12cba08d (patch) | |
| tree | 039a7761db71f826875953dc7ce5e09d5ddb1385 /tcl | |
| parent | b941e2e727387c6c8880990b829a48b289dfc90b (diff) | |
| download | riscv-openocd-4440bf1fcddce3501781496e2d6a9d0f12cba08d.zip riscv-openocd-4440bf1fcddce3501781496e2d6a9d0f12cba08d.tar.gz riscv-openocd-4440bf1fcddce3501781496e2d6a9d0f12cba08d.tar.bz2 | |
psoc6: Run flash algorithm asynchronously to improve performance
Existing psoc6 driver starts flash algorithm for each Flash row. This is
suboptimal from performance point of view, starting/stopping flash
algorithm for each row adds significant overhead. This change starts
flash algorithm and leaves it running asynchronously while driver
performs flash operations.
Performance gain is 170...250% depending on probe:
flash write_image img_256k.bin | w/o this change | with this change |
----------------------------------|-----------------|------------------|
KitProg2/CMSIS-DAP, SWD @ 1 MHz | 4 KiB/s | 10 KiB/s |
J-Link Ultra, SWD @ 1 MHz | 17 KiB/s | 31 KiB/s |
J-Link Ultra, SWD @ 4 MHz | 33 KiB/s | 57 KiB/s |
Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4472
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/psoc6.cfg | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/tcl/target/psoc6.cfg b/tcl/target/psoc6.cfg index ad9aba5..fc0c711 100644 --- a/tcl/target/psoc6.cfg +++ b/tcl/target/psoc6.cfg @@ -82,19 +82,30 @@ proc psoc6_deassert_post { target } { $target arp_examine global RESET_MODE + global TARGET + if { $RESET_MODE ne "run" } { $target arp_poll $target arp_poll set st [$target curstate] + if { $st eq "reset" } { # we assume running state follows # if reset accidentally halts, waiting is useless catch { $target arp_waitstate running 100 } set st [$target curstate] } + if { $st eq "running" } { echo "$target: Ran after reset and before halt..." - $target arp_halt + if { $target eq "${TARGET}.cm0" } { + # Try to cleanly reset whole system + # and halt the CM0 at entry point + psoc6 reset_halt + $target arp_waitstate halted 100 + } else { + $target arp_halt + } } } } @@ -133,3 +144,7 @@ if { $_ENABLE_CM0 } { # Use CM0+ by default on dual-core devices targets ${TARGET}.cm0 } + +if {[using_jtag]} { + swj_newdap $_CHIPNAME bs -irlen 18 -expected-id 0x2e200069 +} |