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author | Antony Pavlov <antonynpavlov@gmail.com> | 2015-09-28 02:04:20 +0300 |
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committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2016-08-14 02:05:18 +0100 |
commit | f1864801a8423ea7cfad7a3149ac1a39de444748 (patch) | |
tree | bf26a8fb855f4b494ba7363cf6fc23abac7005c2 /tcl | |
parent | 352e6c9d4b340a0ebfbcf42416802ef80837a187 (diff) | |
download | riscv-openocd-f1864801a8423ea7cfad7a3149ac1a39de444748.zip riscv-openocd-f1864801a8423ea7cfad7a3149ac1a39de444748.tar.gz riscv-openocd-f1864801a8423ea7cfad7a3149ac1a39de444748.tar.bz2 |
tcl/fpga: add config file for Altera 10M50 FPGA (MAX10 family)
Change-Id: I1a9cfa14e5127226af4e4b4bf30e1b5d6feedc34
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/3605
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'tcl')
-rw-r--r-- | tcl/fpga/altera-10m50.cfg | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tcl/fpga/altera-10m50.cfg b/tcl/fpga/altera-10m50.cfg new file mode 100644 index 0000000..9d00daa --- /dev/null +++ b/tcl/fpga/altera-10m50.cfg @@ -0,0 +1,6 @@ +# Altera MAX10 10M50SAE144C8GES FPGA +# see MAX 10 FPGA Device Architecture +# Table 3-1: IDCODE Information for MAX 10 Devices +# Version Part Number Manuf. ID LSB +# 0000 0011 0001 1000 0101 000 0110 1110 1 +jtag newtap 10m50 tap -expected-id 0x031850dd -irlen 10 |