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author | Tim Newsome <tim@sifive.com> | 2023-12-05 14:35:54 -0800 |
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committer | Tim Newsome <tim@sifive.com> | 2023-12-05 14:35:54 -0800 |
commit | a63b270b38272e7e7427e8d8cf243a4b65af1485 (patch) | |
tree | f9c3cc2e8f74beaba25c1c1e42dadc095a4aa1fd /tcl | |
parent | 64f5ec040830619e1b5015c4c8bebe6503e8437b (diff) | |
parent | a9080087d82688043ca216d50926228d09631297 (diff) | |
download | riscv-openocd-a63b270b38272e7e7427e8d8cf243a4b65af1485.zip riscv-openocd-a63b270b38272e7e7427e8d8cf243a4b65af1485.tar.gz riscv-openocd-a63b270b38272e7e7427e8d8cf243a4b65af1485.tar.bz2 |
Merge commit 'a9080087d82688043ca216d50926228d09631297' into from_upstream
Change-Id: I83a33c1022f8d1a7670ded62f16ec999fc4ef525
Diffstat (limited to 'tcl')
-rw-r--r-- | tcl/board/advantech_imx8qm_dmsse20.cfg | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/tcl/board/advantech_imx8qm_dmsse20.cfg b/tcl/board/advantech_imx8qm_dmsse20.cfg new file mode 100644 index 0000000..a867b2d --- /dev/null +++ b/tcl/board/advantech_imx8qm_dmsse20.cfg @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# configuration file for Advantech IMX8QM DMSSE20 +# + +# only JTAG supported +transport select jtag + +# set a safe JTAG clock speed, can be overridden +adapter speed 1000 + +# default JTAG configuration has only SRST and no TRST +reset_config srst_only srst_push_pull + +# delay after SRST goes inactive +adapter srst delay 70 + +# board has an i.MX8QM with 4 Cortex-A53 cores and 2 Cortex-A72 +set CHIPNAME imx8qm +set CHIPCORES 6 + +# source SoC configuration +source [find tcl/target/imx8qm.cfg] |