diff options
| author | Paul Fertser <fercerpav@gmail.com> | 2013-05-23 15:20:45 +0400 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2013-05-28 08:48:45 +0000 |
| commit | 2aada5b8d9869ebc69984223710253ba905d61cd (patch) | |
| tree | 98072f004aa04b76e527b2d97ee4fe5fa649b3d5 /tcl | |
| parent | 70a2ffac8e2db994e691065259422fa6886ee67f (diff) | |
| download | riscv-openocd-2aada5b8d9869ebc69984223710253ba905d61cd.zip riscv-openocd-2aada5b8d9869ebc69984223710253ba905d61cd.tar.gz riscv-openocd-2aada5b8d9869ebc69984223710253ba905d61cd.tar.bz2 | |
targets: fix target_type name for Cortex-A targets
Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of
renaming of cortex_a8 to cortex_a, including the names in config
files. However that introduced a regression as the name in target_type
struct remained unchanged.
This adds the last missing bit: actual renaming of the target name as
understood by OpenOCD.
Also change the (hopefully) last instance of using it in the supplied
config files, namely from imx6.cfg.
Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1420
Tested-by: jenkins
Reviewed-by: Chris Johns <chrisj@rtems.org>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/imx6.cfg | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg index 707bab8..292b114 100644 --- a/tcl/target/imx6.cfg +++ b/tcl/target/imx6.cfg @@ -37,7 +37,7 @@ jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \ # core 2 - 0x82154000 # core 3 - 0x82156000 set _TARGETNAME $_CHIPNAME.cpu.0 -target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap \ +target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \ -coreid 0 -dbgbase 0x82150000 # some TCK cycles are required to activate the DEBUG power domain @@ -45,7 +45,7 @@ jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100" proc imx6_dbginit {target} { # General Cortex A8/A9 debug initialisation - cortex_a8 dbginit + cortex_a dbginit } # Slow speed to be sure it will work |