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| author | Rohit Singh <rohit91.2008@gmail.com> | 2018-10-12 20:42:11 +0530 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2018-10-17 10:08:49 +0100 |
| commit | d0be1630dc080b0c881830fa28bf2ccfe7850bb8 (patch) | |
| tree | 1235c3565f7cd7486b2b415b4bb89705434dba05 /tcl | |
| parent | 7c298a76374859f87cc3bececb8bbed956c09303 (diff) | |
| download | riscv-openocd-d0be1630dc080b0c881830fa28bf2ccfe7850bb8.zip riscv-openocd-d0be1630dc080b0c881830fa28bf2ccfe7850bb8.tar.gz riscv-openocd-d0be1630dc080b0c881830fa28bf2ccfe7850bb8.tar.bz2 | |
tcl: Add support for the Numato Lab Mimas A7 board
The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to
Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with
it via the its ftdi driver interface. Tested to be working great up to
30 MHz.
Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e
Signed-off-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-on: http://openocd.zylin.com/4720
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <me@mith.ro>
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/board/numato_mimas_a7.cfg | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/tcl/board/numato_mimas_a7.cfg b/tcl/board/numato_mimas_a7.cfg new file mode 100644 index 0000000..1261fea --- /dev/null +++ b/tcl/board/numato_mimas_a7.cfg @@ -0,0 +1,36 @@ +# +# Numato Mimas A7 - Artix 7 FPGA Board +# +# https://numato.com/product/mimas-a7-artix-7-fpga-development-board-with-ddr-sdram-and-gigabit-ethernet +# +# Note: Connect external DC power supply if programming a heavy design onto FPGA. +# Programming while powering via USB may lead to programming failure. +# Therefore, prefer external power supply. + +interface ftdi +ftdi_device_desc "Mimas Artix 7 FPGA Module" +ftdi_vid_pid 0x2a19 0x1009 + +# channel 0 is for custom purpose by users (like uart, fifo etc) +# channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers) +ftdi_channel 1 +ftdi_tdo_sample_edge falling + + +# FTDI Pin Layout +# +# +--------+-------+-------+-------+-------+-------+-------+-------+ +# | DBUS7 | DBUS6 | DBUS5 | DBUS4 | DBUS3 | DBUS2 | DBUS1 | DBUS0 | +# +--------+-------+-------+-------+-------+-------+-------+-------+ +# | PROG_B | OE_N | NC | NC | TMS | TDO | TDI | TCK | +# +--------+-------+-------+-------+-------+-------+-------+-------+ +# +# OE_N is JTAG buffer output enable signal (active-low) +# PROG_B is not used, so left as input to FTDI. +# +ftdi_layout_init 0x0008 0x004b +reset_config none +adapter_khz 30000 + +source [find cpld/xilinx-xc7.cfg] +source [find cpld/jtagspi.cfg] |