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| author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-07-30 22:34:43 +0200 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-07-30 22:36:00 +0200 |
| commit | f4c1f08f164ab74a7893742218ac0f8dd4a2e473 (patch) | |
| tree | 2b44bd6e04f10299c58cbb6e31d0c09d3417f35c /tcl | |
| parent | a463670c312befd86224e74a79aa804ee5fbae03 (diff) | |
| download | riscv-openocd-f4c1f08f164ab74a7893742218ac0f8dd4a2e473.zip riscv-openocd-f4c1f08f164ab74a7893742218ac0f8dd4a2e473.tar.gz riscv-openocd-f4c1f08f164ab74a7893742218ac0f8dd4a2e473.tar.bz2 | |
lpc7168: make flash available upon reset init
set user mode to avoid ROM being mapped at address
0 rather than flash.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/lpc1768.cfg | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg index fc00d78..88827fa 100644 --- a/tcl/target/lpc1768.cfg +++ b/tcl/target/lpc1768.cfg @@ -52,3 +52,22 @@ flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ # a reset-init handler) speeds it up. jtag_rclk [ expr 4000 / 6 ] $_TARGETNAME configure -event reset-start { jtag_rclk [ expr 4000 / 6] } + + +$_TARGETNAME configure -event reset-init { + # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select + # "User Flash Mode" where interrupt vectors are _not_ remapped, + # and reside in flash instead). + # + # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description + # Bit Symbol Value Description Reset + # value + # 0 MAP Memory map control. 0 + # 0 Boot mode. A portion of the Boot ROM is mapped to address 0. + # 1 User mode. The on-chip Flash memory is mapped to address 0. + # 31:1 - Reserved. The value read from a reserved bit is not defined. NA + # + # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user + + mww 0x400FC040 0x01 +} |