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author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2020-01-05 23:19:41 +0100 |
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committer | Tomas Vanek <vanekt@fbl.cz> | 2020-01-16 09:34:42 +0000 |
commit | cc85ebc5acb03a51aafad2e3d913a3c894d93407 (patch) | |
tree | 3bba86cc29ae53b148979df900016807d9b51aad /tcl | |
parent | ed8fa09cfff93dc29903e33e92d36988a30a9529 (diff) | |
download | riscv-openocd-cc85ebc5acb03a51aafad2e3d913a3c894d93407.zip riscv-openocd-cc85ebc5acb03a51aafad2e3d913a3c894d93407.tar.gz riscv-openocd-cc85ebc5acb03a51aafad2e3d913a3c894d93407.tar.bz2 |
flash/nor/stm32l4x : add structure containers to hold devices' information
This rework is inspired from the 'flash/nor/stm32h7x.c'
This rework will ease the support of new devices on top of this driver:
for example: STM32WB have different flash base and size addresses
Notes:
- stm32l4_probe modified in order to charge the correct part_info from
the defined stm32l4_parts according to the device id
- stm32l4_flash_bank.bank2_start is replaced by .part_info->bank1_sectors
- STM32_FLASH_BASE is removed , part_info->flash_regs_base will be used instead
based on that flash register addresses are changed to offsets,
>> stm32l4_get_flash_reg was modified accordingly
- stm32l4_read_option and stm32l4_write_option was modified to accept an
offset instead of an absolute address, luckily this is the commands'
argument by default
- stm32l4_mass_erase modifications :
- use MER2 only on top of dual bank devices
- wait for BUSY bit before starting the mass erase
Change-Id: Ib35bfc3cbadc76bbeaaaba9005b82077b9e1e744
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4932
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Diffstat (limited to 'tcl')
0 files changed, 0 insertions, 0 deletions