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authorBogdan Kolbov <kolbov@niiet.ru>2015-10-13 09:19:25 +0300
committerFreddie Chopin <freddie.chopin@gmail.com>2015-11-26 12:17:25 +0000
commitae2142d5a220a0e8eec3bceb499782ce53596f35 (patch)
treec1bf1b9d5ec9e7d91e38f2ce67d07710adfa260c /tcl/target
parent7a8915ff644c06158ee56f92c10efbd05198d94f (diff)
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niietcm4: support for NIIET's Cortex-M4 microcontrollers
This adds docs, example config, flash driver. Driver is only supports K1921VK01T model for now. Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru> Reviewed-on: http://openocd.zylin.com/3011 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Diffstat (limited to 'tcl/target')
-rwxr-xr-xtcl/target/k1921vk01t.cfg55
1 files changed, 55 insertions, 0 deletions
diff --git a/tcl/target/k1921vk01t.cfg b/tcl/target/k1921vk01t.cfg
new file mode 100755
index 0000000..131bdad
--- /dev/null
+++ b/tcl/target/k1921vk01t.cfg
@@ -0,0 +1,55 @@
+# K1921VK01T
+# http://niiet.ru/chips/nis?id=354
+
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME k1921vk01t
+}
+
+set _ENDIAN little
+
+# Work-area is a space in RAM used for flash programming
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x10000
+}
+
+#jtag scan chain
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x410fc241
+ } {
+ # SWD IDCODE
+ set _CPUTAPID 0x2ba01477
+ }
+}
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+flash bank $_CHIPNAME.flash niietcm4 0 0 0 0 $_TARGETNAME
+
+adapter_khz 2000
+
+adapter_nsrst_delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
+}
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}