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| author | Mathias K <kesmtp@freenet.de> | 2013-02-27 14:01:21 +0100 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2013-03-05 15:09:23 +0000 |
| commit | 0f1d00bda65975ede19fc20df3b490b08a7c1afd (patch) | |
| tree | d369cefb8b0b31870bdf82efe33003f55ad0fe26 /tcl/target | |
| parent | 5d80b365526537d2e8705e8bf4de1485b4bb6be6 (diff) | |
| download | riscv-openocd-0f1d00bda65975ede19fc20df3b490b08a7c1afd.zip riscv-openocd-0f1d00bda65975ede19fc20df3b490b08a7c1afd.tar.gz riscv-openocd-0f1d00bda65975ede19fc20df3b490b08a7c1afd.tar.bz2 | |
Change reset configuration.
This patch change the default reset config from SYSRESETREQ to the working
VECTRESET.
Change-Id: I21a9a74b9c0c68cfa3a6e6dac9b123acc98a93cb
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1186
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/lpc4350.cfg | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg index 6614383..fbbea97 100644 --- a/tcl/target/lpc4350.cfg +++ b/tcl/target/lpc4350.cfg @@ -43,6 +43,9 @@ jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \ target create $_CHIPNAME.m4 cortex_m3 -chain-position $_CHIPNAME.m4 target create $_CHIPNAME.m0 cortex_m3 -chain-position $_CHIPNAME.m0 -# if srst is not fitted use SYSRESETREQ to -# perform a soft reset -cortex_m3 reset_config sysresetreq +# on this CPU we should use VECTRESET to perform a soft reset and +# manually reset the periphery +# SRST or SYSRESETREQ disable the debug interface for the time of +# the reset and will not fit our requirements for a consistent debug +# session +cortex_m3 reset_config vectreset |