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| author | Tomas Vanek <vanekt@fbl.cz> | 2016-12-26 19:59:10 +0100 |
|---|---|---|
| committer | Freddie Chopin <freddie.chopin@gmail.com> | 2017-06-17 12:01:55 +0100 |
| commit | 5a2608bbbc55a63b940fe9da10aaf0c73fcd23dc (patch) | |
| tree | ac13cd30ddf62f030ac1779f2ef1d960e76734d1 /tcl/target | |
| parent | c4d4c32a504f1a63f0200efdd175d21bfe8cc3af (diff) | |
| download | riscv-openocd-5a2608bbbc55a63b940fe9da10aaf0c73fcd23dc.zip riscv-openocd-5a2608bbbc55a63b940fe9da10aaf0c73fcd23dc.tar.gz riscv-openocd-5a2608bbbc55a63b940fe9da10aaf0c73fcd23dc.tar.bz2 | |
flash Kinetis: handle all types of watchdog, disable in reset-init
Active watchdog forces reset during armv7m_checksum_memory()
in verify_image command if run just after reset init.
COP watchdog in KL series and WDOG32 in KE1 series
have longer timeout however they need to be disabled too.
The change extends 'kinetis disable_wdog' command to optionally
probe the chip and use appropriate algorithm to disable watchdog.
Setting of cache type is also split from flash_support flags.
Tcl command 'kinetis disable_wdog' is called in reset-init event.
Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3901
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/klx.cfg | 16 | ||||
| -rw-r--r-- | tcl/target/kx.cfg | 8 |
2 files changed, 16 insertions, 8 deletions
diff --git a/tcl/target/klx.cfg b/tcl/target/klx.cfg index c2de9f7..7dd0404 100644 --- a/tcl/target/klx.cfg +++ b/tcl/target/klx.cfg @@ -37,7 +37,8 @@ flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME kinetis create_banks # Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual -# specifies up to 1MHz for VLPR mode. +# specifies up to 1MHz for VLPR mode and up to 24MHz for run mode; +# Table 17 of Sub-Family Data Sheet rev4 lists 25MHz as the maximum frequency. adapter_khz 1000 reset_config srst_nogate @@ -53,10 +54,9 @@ if {![using_hla]} { cortex_m reset_config sysresetreq } -# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual -# specifies up to 24MHz for run mode; Table 17 of Sub-Family Data -# Sheet rev4 lists 25MHz as the maximum frequency. -# Uncoment only if VLPR mode is not used -#$_TARGETNAME configure -event reset-init { -# adapter_khz 24000 -#} +# Disable watchdog not to disturb OpenOCD algorithms running on MCU +# (e.g. armv7m_checksum_memory() in verify_image) +# Flash driver also disables watchdog before FTFA flash programming. +$_TARGETNAME configure -event reset-init { + kinetis disable_wdog +} diff --git a/tcl/target/kx.cfg b/tcl/target/kx.cfg index cf77713..7b03517 100644 --- a/tcl/target/kx.cfg +++ b/tcl/target/kx.cfg @@ -54,3 +54,11 @@ if {![using_hla]} { # perform a soft reset cortex_m reset_config sysresetreq } + +# Disable watchdog not to disturb OpenOCD algorithms running on MCU +# (e.g. armv7m_checksum_memory() in verify_image) +# Flash driver also disables watchdog before FTFA flash programming. +$_TARGETNAME configure -event reset-init { + kinetis disable_wdog +} + |