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| author | Peter Griffin <peter.griffin@linaro.org> | 2017-06-12 16:28:03 +0100 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2017-10-16 14:10:52 +0100 |
| commit | 0e02fe40c64ad7488aeb351641723e1eb9ae49cb (patch) | |
| tree | e94439461ff9deb0db0da4da894569ecc3368f05 /tcl/target | |
| parent | 2168c475ff7ca0f2914bee39700952600014ac40 (diff) | |
| download | riscv-openocd-0e02fe40c64ad7488aeb351641723e1eb9ae49cb.zip riscv-openocd-0e02fe40c64ad7488aeb351641723e1eb9ae49cb.tar.gz riscv-openocd-0e02fe40c64ad7488aeb351641723e1eb9ae49cb.tar.bz2 | |
tcl: add hi3798 target and Tocoding Poplar board config
This config covers the 4x Cortex A53 CPUs. A custom connector
is required from J14 to standard ARM JTAG on v1 boards. However
v2 hardware should have a standard FTSH-105-01-L-DV connector.
Pinmuxing code to enable JTAG pins is included in l-loader-poplar
repository, so board is flashed with open source code, JTAG
is available at very early boot. Alternatively the following
pokes can be issued from U-Boot to enable JTAG (e.g. to debug
hisilicon SDK).
mw 0xf8a210ec 0x130;
mw 0xf8a210f0 0x130;
mw 0xf8a210f4 0x130;
mw 0xf8a210f8 0x130;
mw 0xf8a210fc 0x130;
mw 0xf8a21100 0x130;
Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-on: http://openocd.zylin.com/4161
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/hi3798.cfg | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/tcl/target/hi3798.cfg b/tcl/target/hi3798.cfg new file mode 100644 index 0000000..9eda150 --- /dev/null +++ b/tcl/target/hi3798.cfg @@ -0,0 +1,49 @@ +# Hisilicon Hi3798 Target + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME hi3798 +} + +# +# Main DAP +# +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x5ba00477 +} + +# declare the one JTAG tap to access the DAP +jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -ignore-version -enable + +# declare the 4 main application cores +set _TARGETNAME $_CHIPNAME.cpu +set _smp_command "" + +set $_TARGETNAME.cti(0) 0x80020000 +set $_TARGETNAME.cti(1) 0x80120000 +set $_TARGETNAME.cti(2) 0x80220000 +set $_TARGETNAME.cti(3) 0x80320000 + +set _cores 4 +for { set _core 0 } { $_core < $_cores } { incr _core 1 } { + + set _command "target create ${_TARGETNAME}$_core aarch64 \ + -chain-position $_CHIPNAME.dap -coreid $_core -ctibase [set $_TARGETNAME.cti($_core)]" + + if { $_core != 0 } { + # non-boot core examination may fail + #set _command "$_command -defer-examine" + set _smp_command "$_smp_command ${_TARGETNAME}$_core" + } else { + # uncomment when "hawt" rtos is merged + # set _command "$_command -rtos hawt" + set _smp_command "target smp ${_TARGETNAME}$_core" + } + + eval $_command +} + +eval $_smp_command |