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authorTim Newsome <tim@sifive.com>2018-05-17 16:47:48 -0700
committerGitHub <noreply@github.com>2018-05-17 16:47:48 -0700
commitbb86173f37c11d1ea305b3e45d6abdaf3d239512 (patch)
tree14353fe637b742813419aa76fd06a0bbc9643914 /tcl/target/imx8m.cfg
parent3344db3d0aef8f3b8c033cb2a098e9ca15e8615c (diff)
parent712d6a5c3aca04e4181e471f796b2da6e04b49ca (diff)
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Merge pull request #251 from riscv/from_upstream
From upstream
Diffstat (limited to 'tcl/target/imx8m.cfg')
-rw-r--r--tcl/target/imx8m.cfg55
1 files changed, 55 insertions, 0 deletions
diff --git a/tcl/target/imx8m.cfg b/tcl/target/imx8m.cfg
new file mode 100644
index 0000000..3314954
--- /dev/null
+++ b/tcl/target/imx8m.cfg
@@ -0,0 +1,55 @@
+#
+# configuration file for NXP i.MX8M family of SoCs
+#
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME imx8m
+}
+
+if { [info exists CHIPCORES] } {
+ set _cores $CHIPCORES
+} else {
+ set _cores 1
+}
+
+# CoreSight Debug Access Port
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x5ba00477
+}
+
+# the DAP tap
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
+ -expected-id $_DAP_TAPID
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.a53
+set _CTINAME $_CHIPNAME.cti
+
+set DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
+set CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+
+ cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \
+ -ctibase [lindex $CTIBASE $_core]
+
+ set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
+ -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core"
+
+ if { $_core != 0 } {
+ # non-boot core examination may fail
+ set _command "$_command -defer-examine"
+ set _smp_command "$_smp_command $_TARGETNAME.$_core"
+ } else {
+ set _smp_command "target smp $_TARGETNAME.$_core"
+ }
+
+ eval $_command
+}
+
+eval $_smp_command
+targets $_TARGETNAME.0