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| author | Tim Newsome <tim@sifive.com> | 2019-09-27 12:07:00 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2019-09-27 12:07:00 -0700 |
| commit | 9aac179cf28fe2af49efd6eeccc6cfcea9b2db3b (patch) | |
| tree | 294eb974448b4c4aa89b6c58c21d398a88bd66af /tcl/target/imx6ul.cfg | |
| parent | bbdc28e0f5f9ca6b706d20bdd1fdfc2ab4a3b825 (diff) | |
| parent | 31100927203a4e9d5e4f8e019b1a9e1c9d7b51c6 (diff) | |
| download | riscv-openocd-9aac179cf28fe2af49efd6eeccc6cfcea9b2db3b.zip riscv-openocd-9aac179cf28fe2af49efd6eeccc6cfcea9b2db3b.tar.gz riscv-openocd-9aac179cf28fe2af49efd6eeccc6cfcea9b2db3b.tar.bz2 | |
Merge branch 'master' into from_upstream
Change-Id: I036350ee06aa396344fb8a80c7dba148ec24c9c8
Diffstat (limited to 'tcl/target/imx6ul.cfg')
| -rw-r--r-- | tcl/target/imx6ul.cfg | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/tcl/target/imx6ul.cfg b/tcl/target/imx6ul.cfg new file mode 100644 index 0000000..f42aa63 --- /dev/null +++ b/tcl/target/imx6ul.cfg @@ -0,0 +1,50 @@ +# +# Freescale i.MX6UltraLite series: 6UL 6ULL 6ULZ +# + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME imx6ul +} + +# CoreSight Debug Access Port +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x4ba00477 +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \ + -expected-id $_DAP_TAPID + +# SDMA / no IDCODE +jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f + +# System JTAG Controller +set _SJC_TAPID_6UL 0x0891d01d +set _SJC_TAPID_6ULL 0x0891e01d +set _SJC_TAPID_6ULZ 0x1891e01d + +# Allow external override of the first SJC TAPID +if { [info exists SJC_TAPID] } { + set _SJC_TAPID $SJC_TAPID +} else { + set _SJC_TAPID $_SJC_TAPID_6UL +} + +jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \ + -ignore-version \ + -expected-id $_SJC_TAPID \ + -expected-id $_SJC_TAPID_6ULL \ + -expected-id $_SJC_TAPID_6ULZ \ + +# Create DAP +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +# Main AHB bus +target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0 + +# Cortex-A7 single core +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -dbgbase 0x82130000 |