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author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-04-10 22:53:27 +0200 |
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committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-03-30 09:48:03 +0100 |
commit | f444c57bf2d692171b7b50a6ce477265f951f77e (patch) | |
tree | 72b214a4fc6c15470c4a675cae654c3265b3d349 /tcl/target/hi6220.cfg | |
parent | 1756f393e45c2a23dd29ff8bc85d188b547624f9 (diff) | |
download | riscv-openocd-f444c57bf2d692171b7b50a6ce477265f951f77e.zip riscv-openocd-f444c57bf2d692171b7b50a6ce477265f951f77e.tar.gz riscv-openocd-f444c57bf2d692171b7b50a6ce477265f951f77e.tar.bz2 |
arm_cti: add cti command group
Extend the CTI abstraction to be accessible from TCL and
change the 'target' command to accept a cti 'object' instead of a
base address. This also allows accessing CTI instances that are not
related to a configured target.
Change-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4031
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'tcl/target/hi6220.cfg')
-rw-r--r-- | tcl/target/hi6220.cfg | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/tcl/target/hi6220.cfg b/tcl/target/hi6220.cfg index 7daa3c1..13d8586 100644 --- a/tcl/target/hi6220.cfg +++ b/tcl/target/hi6220.cfg @@ -34,8 +34,10 @@ set $_TARGETNAME.cti(7) 0x801DB000 set _cores 8 for { set _core 0 } { $_core < $_cores } { incr _core 1 } { + cti create cti$_core -chain-position $_CHIPNAME.dap -ctibase [set $_TARGETNAME.cti($_core)] -ap-num 0 + set _command "target create ${_TARGETNAME}$_core aarch64 \ - -chain-position $_CHIPNAME.dap -coreid $_core -ctibase [set $_TARGETNAME.cti($_core)]" + -chain-position $_CHIPNAME.dap -coreid $_core -cti cti$_core" if { $_core != 0 } { # non-boot core examination may fail @@ -52,5 +54,10 @@ for { set _core 0 } { $_core < $_cores } { incr _core 1 } { eval $_smp_command +cti create cti.sys -chain-position hi6220.dap -ap-num 0 -ctibase 0x80003000 + # declare the auxiliary Cortex-M3 core on AP #2 (runs mcuimage.bin) target create ${_TARGETNAME}.m3 cortex_m -chain-position $_CHIPNAME.dap -ap-num 2 -defer-examine + +# declare the auxiliary Cortex-A7 core +target create ${_TARGETNAME}.a7 cortex_a -chain-position $_CHIPNAME.dap -dbgbase 0x80210000 -defer-examine |