diff options
| author | Spencer Oliver <spen@spen-soft.co.uk> | 2013-02-01 15:43:21 +0000 |
|---|---|---|
| committer | Freddie Chopin <freddie.chopin@gmail.com> | 2013-04-28 08:56:04 +0000 |
| commit | d9ba56c295f057e716519a798bf9cdb4898c24f4 (patch) | |
| tree | 97cf857c0330b370afb0c9a5a681a76e253d80f1 /tcl/target/amdm37x.cfg | |
| parent | b7d2cdc0d4fc319169c60362708a67e2ff626525 (diff) | |
| download | riscv-openocd-d9ba56c295f057e716519a798bf9cdb4898c24f4.zip riscv-openocd-d9ba56c295f057e716519a798bf9cdb4898c24f4.tar.gz riscv-openocd-d9ba56c295f057e716519a798bf9cdb4898c24f4.tar.bz2 | |
target: rename cortex_a8 to cortex_a
Rename cortex_a8 target to use a more correct cortex_a name.
This also adds a deprecated_name var so that older scripts issue a warning
to update the target name.
cfg files have also been updated to the new target name.
Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1130
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Diffstat (limited to 'tcl/target/amdm37x.cfg')
| -rw-r--r-- | tcl/target/amdm37x.cfg | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcl/target/amdm37x.cfg b/tcl/target/amdm37x.cfg index 3121e8f..ab2ccab 100644 --- a/tcl/target/amdm37x.cfg +++ b/tcl/target/amdm37x.cfg @@ -141,7 +141,7 @@ jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap" # Create the CPU target to be used with GDB: Cortex-A8, using DAP set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap +target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap # The DM37x has 64K of SRAM starting at address 0x4020_0000. Allow the first # 16K to be used as a scratchpad for OpenOCD. @@ -200,7 +200,7 @@ $_TARGETNAME configure -event gdb-attach { # reset sequence. proc amdm37x_dbginit {target} { # General Cortex A8 debug initialisation - cortex_a8 dbginit + cortex_a dbginit # Enable DBGEN signal. This signal is described in the ARM v7 TRM, but # access to the signal appears to be implementation specific. TI does not |