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| author | Ivan Buliev <i.buliev@mikrosistemi.com> | 2015-05-30 15:26:28 +0300 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2015-09-30 22:12:16 +0100 |
| commit | 03f46e368830c7293f83186658268a6cd4557b20 (patch) | |
| tree | 0337291e7328dd792f0da1660a34dfac01c968f4 /tcl/target/aducm360.cfg | |
| parent | 288a1f453d2c786332946f16d5610950daeb83e5 (diff) | |
| download | riscv-openocd-03f46e368830c7293f83186658268a6cd4557b20.zip riscv-openocd-03f46e368830c7293f83186658268a6cd4557b20.tar.gz riscv-openocd-03f46e368830c7293f83186658268a6cd4557b20.tar.bz2 | |
flash: Analog Devices ADuCM360 support
A target config and a simple flash driver for the ADuCM360 microcontroller.
The EEPROM of the chip may be erased and programmed.
Change-Id: Ic2bc2f91ec5b6f72e3976dbe18071f461fe503b8
Signed-off-by: Ivan Buliev <i.buliev@mikrosistemi.com>
Reviewed-on: http://openocd.zylin.com/2787
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Diffstat (limited to 'tcl/target/aducm360.cfg')
| -rwxr-xr-x | tcl/target/aducm360.cfg | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/tcl/target/aducm360.cfg b/tcl/target/aducm360.cfg new file mode 100755 index 0000000..785c18c --- /dev/null +++ b/tcl/target/aducm360.cfg @@ -0,0 +1,55 @@ +# +# This file was created using as references the stm32f1x.cfg and aduc702x.cfg +# +source [find target/swj-dp.tcl] + +# Chip name +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME aducm360 +} + +# Endianess +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# Eventually, the whole SRAM of ADuCM360 will be used (8kB) +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x2000 +} + +#jtag scan chain +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x2ba01477 +} + +swd newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +# SWD/JTAG speed +adapter_khz 1000 + +## +## Target configuration +## +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +# allocate the working area +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +# flash size will be probed +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME aducm360 0x00 0 0 0 $_TARGETNAME + +adapter_nsrst_delay 100 + +cortex_m reset_config sysresetreq |