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author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-01-20 23:09:20 +0000 |
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committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-01-20 23:11:25 +0000 |
commit | dbecb13b240867e12e43dba032a45891000bffe9 (patch) | |
tree | ab711ecf845a13767982f26f8247e3db03470e84 /src | |
parent | 2a0c9b08d7ee0c1b0eb5b593d18f68d0c910927d (diff) | |
download | riscv-openocd-dbecb13b240867e12e43dba032a45891000bffe9.zip riscv-openocd-dbecb13b240867e12e43dba032a45891000bffe9.tar.gz riscv-openocd-dbecb13b240867e12e43dba032a45891000bffe9.tar.bz2 |
BUILD: remove cygwin gcc 3.4.4 build warnings
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r-- | src/target/cortex_m3.c | 4 | ||||
-rw-r--r-- | src/target/mips32_pracc.c | 2 | ||||
-rw-r--r-- | src/target/mips_m4k.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 762e318..adce4d9 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1675,8 +1675,8 @@ static int cortex_m3_examine(struct target *target) return retval; if (((cpuid >> 4) & 0xc3f) == 0xc23) - LOG_DEBUG("Cortex-M3 r%dp%d processor detected", - (cpuid >> 20) & 0xf, (cpuid >> 0) & 0xf); + LOG_DEBUG("Cortex-M3 r%" PRId8 "p%" PRId8 " processor detected", + (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf)); LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid); /* NOTE: FPB and DWT are both optional. */ diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index 11d5a43..7d91d42 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -968,7 +968,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are /* write program into RAM */ mips32_pracc_write_mem32(ejtag_info, source->address, ARRAY_SIZE(handler_code), handler_code); - LOG_DEBUG("%s using 0x%.8x for write handler\n", __func__, source->address); + LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler\n", __func__, source->address); jmp_code[1] |= UPPER16(source->address); jmp_code[2] |= LOWER16(source->address); diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 1a65c50..5f5aa72 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -981,7 +981,7 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t int retval; int write = 1; - LOG_DEBUG("address: 0x%8.8x, count: 0x%8.8x", address, count); + LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count); if (target->state != TARGET_HALTED) { |