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authorMegan Wachs <megan@sifive.com>2017-05-01 09:39:59 -0700
committerMegan Wachs <megan@sifive.com>2017-05-01 09:39:59 -0700
commit458bb2069943f81d01febebe209b03804e56f129 (patch)
tree88a013c99fbf24010cda13f0bea42f35d7e761e1 /src
parent84627503578d2611845d678a1db9b03d1d18f6b6 (diff)
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riscv-013: Correct sign extension of address on read_memory for lower bits as well
Diffstat (limited to 'src')
-rw-r--r--src/target/riscv/riscv-013.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 584014d..4a6bbdb 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -1267,7 +1267,7 @@ static int read_memory(struct target *target, uint32_t address,
case 64:
riscv_program_write_ram(&program, r_addr + 4, (((riscv_addr_t)(address)) - size) >> 32);
case 32:
- riscv_program_write_ram(&program, r_addr, (riscv_addr_t)(address - size));
+ riscv_program_write_ram(&program, r_addr, (riscv_addr_t)(address) - size);
break;
default:
LOG_ERROR("unknown XLEN %d", riscv_xlen(target));