diff options
| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2018-12-21 19:34:58 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2019-01-16 10:53:24 +0000 |
| commit | d140fb27c6afbfa1fe609b5f0db274d4a5273483 (patch) | |
| tree | eeb1b3e772749296495556c75e6486a2b996710a /src | |
| parent | 63aa91701532451889e2bc0666cd3d81b825afff (diff) | |
| download | riscv-openocd-d140fb27c6afbfa1fe609b5f0db274d4a5273483.zip riscv-openocd-d140fb27c6afbfa1fe609b5f0db274d4a5273483.tar.gz riscv-openocd-d140fb27c6afbfa1fe609b5f0db274d4a5273483.tar.bz2 | |
cortex_m: fix bug in poll() machine state (external resume awareness)
This patch covers the fact that cortex_m could be resumed externally by
Cross Trigger Interface or by direct write to DHSCR ...
To reproduce:
- halt the target
- then run the core through DHCSR (mww 0xe000edf0 0xa05f0001)
=> this resumes the core, but target state in OpenOCD remains HALTED.
Change-Id: Ifa1ae18645bfeb863acc78a039bbf04873fd78fe
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4817
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/cortex_m.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index e8ad770..06e1c1c 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -564,6 +564,17 @@ static int cortex_m_poll(struct target *target) } } + /* Check that target is truly halted, since the target could be resumed externally */ + if ((prev_target_state == TARGET_HALTED) && !(cortex_m->dcb_dhcsr & S_HALT)) { + /* registers are now invalid */ + register_cache_invalidate(armv7m->arm.core_cache); + + target->state = TARGET_RUNNING; + LOG_WARNING("%s: external resume detected", target_name(target)); + target_call_event_callbacks(target, TARGET_EVENT_RESUMED); + retval = ERROR_OK; + } + /* Did we detect a failure condition that we cleared? */ if (detected_failure != ERROR_OK) retval = detected_failure; |