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| author | Tim Newsome <tim@sifive.com> | 2018-02-26 12:06:47 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-02-26 12:06:47 -0800 |
| commit | 9033d994911cfee6d0d33fb6454eb301144e6a13 (patch) | |
| tree | 5f044c49ab796b861bb8f0e6ad4d941631346dfc /src/target | |
| parent | 3c1c6e059c0129743b3b7f26dcd96e0aa0faa380 (diff) | |
| parent | 6b02ab4196d4e2ce64e8f14be053ca7200591afd (diff) | |
| download | riscv-openocd-9033d994911cfee6d0d33fb6454eb301144e6a13.zip riscv-openocd-9033d994911cfee6d0d33fb6454eb301144e6a13.tar.gz riscv-openocd-9033d994911cfee6d0d33fb6454eb301144e6a13.tar.bz2 | |
Merge pull request #217 from riscv/disable_target64
build with --disable-target64
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/mips_m4k.c | 4 | ||||
| -rw-r--r-- | src/target/riscv/riscv-013.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 7d1c06c..78718ca 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -702,7 +702,7 @@ static int mips_m4k_set_breakpoint(struct target *target, } if (verify == 0) { - LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx64 + LOG_ERROR("Unable to set 32bit breakpoint at address %08" TARGET_PRIxADDR " - check that memory is read/writable", breakpoint->address); return ERROR_OK; } @@ -723,7 +723,7 @@ static int mips_m4k_set_breakpoint(struct target *target, return retval; if (verify != MIPS16_SDBBP(isa_req)) { - LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx64 + LOG_ERROR("Unable to set 16bit breakpoint at address %08" TARGET_PRIxADDR " - check that memory is read/writable", breakpoint->address); return ERROR_OK; } diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 22a4c87..6daad3c 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -795,12 +795,12 @@ static int examine_progbuf(struct target *target) uint32_t written = dmi_read(target, DMI_PROGBUF0); if (written == (uint32_t) info->progbuf_address) { - LOG_INFO("progbuf is writable at 0x%" TARGET_PRIxADDR, + LOG_INFO("progbuf is writable at 0x%" PRIx64, info->progbuf_address); info->progbuf_writable = YNM_YES; } else { - LOG_INFO("progbuf is not writeable at 0x%" TARGET_PRIxADDR, + LOG_INFO("progbuf is not writeable at 0x%" PRIx64, info->progbuf_address); info->progbuf_writable = YNM_NO; } @@ -1746,8 +1746,8 @@ static int read_memory_progbuf(struct target *target, target_addr_t address, * dm_data0 contains mem[s0 - 2*size] * s1 contains mem[s0-size] */ - LOG_DEBUG("creating burst to read from 0x%" TARGET_PRIxADDR - " up to 0x%" TARGET_PRIxADDR, read_addr, fin_addr); + LOG_DEBUG("creating burst to read from 0x%" PRIx64 + " up to 0x%" PRIx64, read_addr, fin_addr); assert(read_addr >= address && read_addr < fin_addr); struct riscv_batch *batch = riscv_batch_alloc(target, 32, info->dmi_busy_delay + info->ac_busy_delay); |