diff options
author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-15 16:56:50 -0700 |
---|---|---|
committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-15 16:56:50 -0700 |
commit | 9d308db2bc72378b6b16aec7c58ccc08d21a23a5 (patch) | |
tree | a5536de252caac4c049027e5a2cb1b5e07e4d907 /src/target | |
parent | 8252b9d36cd327a06c3a096ee1175a891d71eb11 (diff) | |
download | riscv-openocd-9d308db2bc72378b6b16aec7c58ccc08d21a23a5.zip riscv-openocd-9d308db2bc72378b6b16aec7c58ccc08d21a23a5.tar.gz riscv-openocd-9d308db2bc72378b6b16aec7c58ccc08d21a23a5.tar.bz2 |
Print out the actual CSR that's read
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/riscv/riscv-013.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8aeaab6..4d309cb 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -577,6 +577,7 @@ static int register_read_direct(struct target *target, uint64_t *value, uint32_t } else if (number >= GDB_REGNO_FPR0 && number <= GDB_REGNO_FPR31) { riscv_program_fsd(&program, number, output); } else if (number >= GDB_REGNO_CSR0 && number <= GDB_REGNO_CSR4095) { + LOG_DEBUG("reading CSR index=0x%03x", number - GDB_REGNO_CSR0); enum gdb_regno temp = riscv_program_gettemp(&program); riscv_program_csrr(&program, temp, number); riscv_program_sx(&program, temp, output); |