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| author | Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> | 2015-07-15 12:53:40 +0200 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2015-10-30 12:56:09 +0000 |
| commit | 0663cb5e47413d42838fbbe15b568a20ee1c0232 (patch) | |
| tree | 5fe3587c8cbc0a80d3b8632a77b072b51416dbfe /src/target | |
| parent | 11eff9baea0bb09a53fa12f3262c8144c86e9b57 (diff) | |
| download | riscv-openocd-0663cb5e47413d42838fbbe15b568a20ee1c0232.zip riscv-openocd-0663cb5e47413d42838fbbe15b568a20ee1c0232.tar.gz riscv-openocd-0663cb5e47413d42838fbbe15b568a20ee1c0232.tar.bz2 | |
Cortex-M: Detect Flash Patch Revision and implement Rev. 2 handling.
E.g. STM32F7 implements Rev.2.
Supercedes abandoned patch 2755 that doesn't evaluate Flash patch revision.
Change-Id: I48756b0451c7359475066969c900978a536bc328
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2868
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/cortex_m.c | 17 | ||||
| -rw-r--r-- | src/target/cortex_m.h | 1 |
2 files changed, 15 insertions, 3 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 8795671..b55de1b 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1125,7 +1125,6 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint { int retval; int fp_num = 0; - uint32_t hilo; struct cortex_m_common *cortex_m = target_to_cm(target); struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list; @@ -1138,6 +1137,7 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint breakpoint->type = BKPT_TYPE_BY_ADDR(breakpoint->address); if (breakpoint->type == BKPT_HARD) { + uint32_t fpcr_value; while (comparator_list[fp_num].used && (fp_num < cortex_m->fp_num_code)) fp_num++; if (fp_num >= cortex_m->fp_num_code) { @@ -1145,9 +1145,17 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint return ERROR_FAIL; } breakpoint->set = fp_num + 1; - hilo = (breakpoint->address & 0x2) ? FPCR_REPLACE_BKPT_HIGH : FPCR_REPLACE_BKPT_LOW; + fpcr_value = breakpoint->address | 1; + if (cortex_m->fp_rev == 0) { + uint32_t hilo; + hilo = (breakpoint->address & 0x2) ? FPCR_REPLACE_BKPT_HIGH : FPCR_REPLACE_BKPT_LOW; + fpcr_value = (fpcr_value & 0x1FFFFFFC) | hilo | 1; + } else if (cortex_m->fp_rev > 1) { + LOG_ERROR("Unhandled Cortex-M Flash Patch Breakpoint architecture revision"); + return ERROR_FAIL; + } comparator_list[fp_num].used = 1; - comparator_list[fp_num].fpcr_value = (breakpoint->address & 0x1FFFFFFC) | hilo | 1; + comparator_list[fp_num].fpcr_value = fpcr_value; target_write_u32(target, comparator_list[fp_num].fpcr_address, comparator_list[fp_num].fpcr_value); LOG_DEBUG("fpc_num %i fpcr_value 0x%" PRIx32 "", @@ -1962,6 +1970,9 @@ int cortex_m_examine(struct target *target) cortex_m->fp_num_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF); cortex_m->fp_num_lit = (fpcr >> 8) & 0xF; cortex_m->fp_code_available = cortex_m->fp_num_code; + /* Detect flash patch revision, see RM DDI 0403E.b page C1-817. + Revision is zero base, fp_rev == 1 means Rev.2 ! */ + cortex_m->fp_rev = (fpcr >> 28) & 0xf; free(cortex_m->fp_comparator_list); cortex_m->fp_comparator_list = calloc( cortex_m->fp_num_code + cortex_m->fp_num_lit, diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 028b4c8..94a30f1 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -175,6 +175,7 @@ struct cortex_m_common { int fp_num_lit; int fp_num_code; int fp_code_available; + int fp_rev; int fpb_enabled; int auto_bp_type; struct cortex_m_fp_comparator *fp_comparator_list; |