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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-10-15 11:44:36 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-10-15 11:44:36 +0000 |
commit | ccc2e3fe760a425f831b9e1f0e143d7d01d73a25 (patch) | |
tree | ccb4bbe1c3221f1438d12a04cdc203617d18d5ee /src/target/xscale.c | |
parent | af41e6aac8d2aadf2bcfc84a77ac0f9ded8e7830 (diff) | |
download | riscv-openocd-ccc2e3fe760a425f831b9e1f0e143d7d01d73a25.zip riscv-openocd-ccc2e3fe760a425f831b9e1f0e143d7d01d73a25.tar.gz riscv-openocd-ccc2e3fe760a425f831b9e1f0e143d7d01d73a25.tar.bz2 |
Laurentiu Cocanu - memory read/write and exit() error path fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@1064 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/xscale.c')
-rw-r--r-- | src/target/xscale.c | 32 |
1 files changed, 26 insertions, 6 deletions
diff --git a/src/target/xscale.c b/src/target/xscale.c index 20c7f64..9cf4389 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -2142,6 +2142,7 @@ void xscale_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_ca int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { + int retval; armv4_5_common_t *armv4_5 = target->arch_info; xscale_common_t *xscale = armv4_5->arch_info; @@ -2186,16 +2187,28 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) if (breakpoint->length == 4) { /* keep the original instruction in target endianness */ - target->type->read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr); + if((retval = target->type->read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK) + { + return retval; + } /* write the original instruction in target endianness (arm7_9->arm_bkpt is host endian) */ - target_write_u32(target, breakpoint->address, xscale->arm_bkpt); + if((retval = target_write_u32(target, breakpoint->address, xscale->arm_bkpt)) != ERROR_OK) + { + return retval; + } } else { /* keep the original instruction in target endianness */ - target->type->read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr); + if((retval = target->type->read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK) + { + return retval; + } /* write the original instruction in target endianness (arm7_9->arm_bkpt is host endian) */ - target_write_u32(target, breakpoint->address, xscale->thumb_bkpt); + if((retval = target_write_u32(target, breakpoint->address, xscale->thumb_bkpt)) != ERROR_OK) + { + return retval; + } } breakpoint->set = 1; } @@ -2242,6 +2255,7 @@ int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int xscale_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { + int retval; armv4_5_common_t *armv4_5 = target->arch_info; xscale_common_t *xscale = armv4_5->arch_info; @@ -2276,11 +2290,17 @@ int xscale_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) /* restore original instruction (kept in target endianness) */ if (breakpoint->length == 4) { - target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr); + if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK) + { + return retval; + } } else { - target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr); + if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK) + { + return retval; + } } breakpoint->set = 0; } |