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| author | Oleksij Rempel <external.Oleksij.Rempel@de.bosch.com> | 2015-04-01 14:44:41 +0200 |
|---|---|---|
| committer | Freddie Chopin <freddie.chopin@gmail.com> | 2015-11-03 22:13:03 +0000 |
| commit | 0578e4c4f4fbaec3e833fec0c118cee4698ce7c6 (patch) | |
| tree | daba6d86e7db52d5fa7bbdc3d0e176fcf6ecfd25 /src/target/target.c | |
| parent | 3f0aef4272131caf7d696f28cf4bea676531734e (diff) | |
| download | riscv-openocd-0578e4c4f4fbaec3e833fec0c118cee4698ce7c6.zip riscv-openocd-0578e4c4f4fbaec3e833fec0c118cee4698ce7c6.tar.gz riscv-openocd-0578e4c4f4fbaec3e833fec0c118cee4698ce7c6.tar.bz2 | |
target: tell which target state is meant
If we work on smp system, the output of step command will depend
on Id of default target.
This patch adds additional information to help find what on which
core is happening.
Example of LOG after this patch.
imx6.cpu.1: target state: halted
^^^^^^^^^^
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x60000093 pc: 0x80076c0c
MMU: enabled, D-Cache: enabled, I-Cache: enabled
imx6.cpu.0: target state: halted
^^^^^^^^^^
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x20000193 pc: 0x802ccb6c
MMU: enabled, D-Cache: enabled, I-Cache: enabled
Change-Id: I536a2cce33b5ab10af9de2a43b9960320c17729f
Signed-off-by: Oleksij Rempel <external.Oleksij.Rempel@de.bosch.com>
Reviewed-on: http://openocd.zylin.com/2691
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/target.c')
| -rw-r--r-- | src/target/target.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/target/target.c b/src/target/target.c index 19e5d65..2c30ce9 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1930,7 +1930,8 @@ int target_arch_state(struct target *target) return ERROR_OK; } - LOG_USER("target state: %s", target_state_name(target)); + LOG_USER("%s: target state: %s", target_name(target), + target_state_name(target)); if (target->state != TARGET_HALTED) return ERROR_OK; |