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| author | Oleksij Rempel <bug-track@fisher-privat.net> | 2013-04-15 09:40:21 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2013-07-17 14:33:18 +0000 |
| commit | 6fb232c2561710fac123199febe20bfde0aace98 (patch) | |
| tree | 1a10c6f5e2f0e18c939f1e84992c5c724393712b /src/target/mips32.h | |
| parent | 21dfb6ee1a238beb7b6e7c1874768c8a9b996e0b (diff) | |
| download | riscv-openocd-6fb232c2561710fac123199febe20bfde0aace98.zip riscv-openocd-6fb232c2561710fac123199febe20bfde0aace98.tar.gz riscv-openocd-6fb232c2561710fac123199febe20bfde0aace98.tar.bz2 | |
mips32: add jump instruction
This instruction we will need to make jump to 0xff20.0000
Change-Id: Ic723e683e8848492cd8e186e71fd668dbd1d97e6
Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net>
Reviewed-on: http://openocd.zylin.com/1338
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/mips32.h')
| -rw-r--r-- | src/target/mips32.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/mips32.h b/src/target/mips32.h index d75cb4e..97fb5d0 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -130,6 +130,7 @@ struct mips32_algorithm { #define MIPS32_OP_AND 0x24 #define MIPS32_OP_CACHE 0x2F #define MIPS32_OP_COP0 0x10 +#define MIPS32_OP_J 0x02 #define MIPS32_OP_JR 0x08 #define MIPS32_OP_LUI 0x0F #define MIPS32_OP_LW 0x23 @@ -175,6 +176,7 @@ struct mips32_algorithm { #define MIPS32_BGTZ(reg, off) MIPS32_I_INST(MIPS32_OP_BGTZ, reg, 0, off) #define MIPS32_BNE(src, tar, off) MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off) #define MIPS32_CACHE(op, off, base) MIPS32_I_INST(MIPS32_OP_CACHE, base, op, off) +#define MIPS32_J(tar) MIPS32_J_INST(MIPS32_OP_J, tar) #define MIPS32_JR(reg) MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_JR) #define MIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel) #define MIPS32_MTC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel) |