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| author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-01-08 22:35:08 +0000 |
|---|---|---|
| committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-01-09 13:37:02 +0000 |
| commit | 70738bd75dbc122e380ff3288542ac4e73700eed (patch) | |
| tree | 29590df30abf8a6d7dc8f2c2315560a5afdad96f /src/target/mips32.h | |
| parent | fc9a2d0e6f3270dc86f84749ad10dd79d97c8392 (diff) | |
| download | riscv-openocd-70738bd75dbc122e380ff3288542ac4e73700eed.zip riscv-openocd-70738bd75dbc122e380ff3288542ac4e73700eed.tar.gz riscv-openocd-70738bd75dbc122e380ff3288542ac4e73700eed.tar.bz2 | |
MIPS: update arch_info access to match other targets
- add target_to_mips32 and target_to_m4k to match test of codebase.
- mips32_arch_state now shows if processer is running mips16e isa.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/target/mips32.h')
| -rw-r--r-- | src/target/mips32.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/target/mips32.h b/src/target/mips32.h index 4fe61bc..b731c68 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -26,7 +26,6 @@ #include "target.h" #include "mips32_pracc.h" - #define MIPS32_COMMON_MAGIC 0xB320B320 /* offsets into mips32 core register cache */ @@ -36,10 +35,17 @@ enum MIPS32NUMCOREREGS }; +enum mips32_isa_mode +{ + MIPS32_ISA_MIPS32 = 0, + MIPS32_ISA_MIPS16E = 1, +}; + +extern const char *mips_isa_strings[]; + struct mips32_comparator { int used; - //int type; uint32_t bp_value; uint32_t reg_address; }; @@ -51,6 +57,7 @@ struct mips32_common struct reg_cache *core_cache; struct mips_ejtag ejtag_info; uint32_t core_regs[MIPS32NUMCOREREGS]; + enum mips32_isa_mode isa_mode; int bp_scanned; int num_inst_bpoints; @@ -65,6 +72,12 @@ struct mips32_common int (*write_core_reg)(struct target *target, int num); }; +static inline struct mips32_common * +target_to_mips32(struct target *target) +{ + return target->arch_info; +} + struct mips32_core_reg { uint32_t num; |