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| author | David Claffey <dnclaffey@gmail.com> | 2009-12-16 11:23:52 +0000 |
|---|---|---|
| committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-01-05 19:54:35 +0000 |
| commit | 03e8649bc699053ccdbbd4a3c2eaf05241e22a5b (patch) | |
| tree | fda73d0fd96b2d64d42ba0dac81ea564b4ea233a /src/target/mips32.h | |
| parent | 95f86e8e0525fc93093cc2bc060df5017d2f504e (diff) | |
| download | riscv-openocd-03e8649bc699053ccdbbd4a3c2eaf05241e22a5b.zip riscv-openocd-03e8649bc699053ccdbbd4a3c2eaf05241e22a5b.tar.gz riscv-openocd-03e8649bc699053ccdbbd4a3c2eaf05241e22a5b.tar.bz2 | |
MIPS: merge mips fast_data patch from David N. Claffey
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/target/mips32.h')
| -rw-r--r-- | src/target/mips32.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/mips32.h b/src/target/mips32.h index 7d1928e..9ad5293 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -77,6 +77,7 @@ struct mips32_core_reg #define MIPS32_OP_ADDI 0x08 #define MIPS32_OP_AND 0x24 #define MIPS32_OP_COP0 0x10 +#define MIPS32_OP_JR 0x08 #define MIPS32_OP_LUI 0x0F #define MIPS32_OP_LW 0x23 #define MIPS32_OP_LBU 0x24 @@ -103,6 +104,7 @@ struct mips32_core_reg #define MIPS32_B(off) MIPS32_BEQ(0, 0, off) #define MIPS32_BEQ(src,tar,off) MIPS32_I_INST(MIPS32_OP_BEQ, src, tar, off) #define MIPS32_BNE(src,tar,off) MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off) +#define MIPS32_JR(reg) MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_JR) #define MIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel) #define MIPS32_MTC0(gpr,cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel) #define MIPS32_LBU(reg, off, base) MIPS32_I_INST(MIPS32_OP_LBU, base, reg, off) |