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author | Antony Pavlov <antonynpavlov@gmail.com> | 2014-10-07 12:36:55 +0400 |
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committer | Spencer Oliver <spen@spen-soft.co.uk> | 2014-11-24 22:22:53 +0000 |
commit | f16b7a6d7e4464692c7fcd8d39e150a09c270d1b (patch) | |
tree | c4972574fc8cd1f2ef52f68dd7a3678d76793a9b /src/target/mips32.h | |
parent | fd25b3bcd1ccde5ae4dc7e94a0ad3863ee016555 (diff) | |
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mips32: fix typos
Change-Id: Ibb98fe3da68bf670a5bb83600bb49647db8a4163
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2338
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/mips32.h')
-rw-r--r-- | src/target/mips32.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/mips32.h b/src/target/mips32.h index 951b2ed..4f44384 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -203,7 +203,7 @@ struct mips32_algorithm { #define MIPS32_SYNCI_STEP 0x1 /* reg num od address step size to be used with synci instruction */ /** - * Cache operations definietions + * Cache operations definitions * Operation field is 5 bits long : * 1) bits 1..0 hold cache type * 2) bits 4..2 hold operation code |