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| author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-09-28 10:41:43 +0000 |
|---|---|---|
| committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-09-28 10:41:43 +0000 |
| commit | a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d (patch) | |
| tree | bc069458c57c3bb587df10d5bd257d5f49657e68 /src/target/etm.h | |
| parent | b855855445489c43de2b796f1ac921e518d787bd (diff) | |
| download | riscv-openocd-a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d.zip riscv-openocd-a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d.tar.gz riscv-openocd-a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d.tar.bz2 | |
- str9x flash support (Thanks to Spencer Oliver)
- str75x flash support (Thanks to Spencer Oliver)
- correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this)
- core-state (ARM/Thumb) can be switched by modifying CPSR
- fixed bug in gdb_server register handling
- register values > 32-bit should now be supported
- several minor fixes and enhancements
git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/etm.h')
| -rw-r--r-- | src/target/etm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/etm.h b/src/target/etm.h index dbe78f3..4b24e5c 100644 --- a/src/target/etm.h +++ b/src/target/etm.h @@ -71,6 +71,6 @@ extern int etm_write_reg(reg_t *reg, u32 value); extern int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
extern int etm_store_reg(reg_t *reg);
extern int etm_set_reg(reg_t *reg, u32 value);
-extern int etm_set_reg_w_exec(reg_t *reg, u32 value);
+extern int etm_set_reg_w_exec(reg_t *reg, u8 *buf);
#endif /* ETM_H */
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