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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2018-11-03 14:52:30 +0100 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-11-06 12:18:40 +0000 |
| commit | cf9c0fba9bae1eead383db94a9865f34eac6c811 (patch) | |
| tree | 3f8a8c926cdf4558d947758c532b9665d19428e2 /src/target/cortex_a.c | |
| parent | fac9be64d9444138c77ffe45078a85e063593a38 (diff) | |
| download | riscv-openocd-cf9c0fba9bae1eead383db94a9865f34eac6c811.zip riscv-openocd-cf9c0fba9bae1eead383db94a9865f34eac6c811.tar.gz riscv-openocd-cf9c0fba9bae1eead383db94a9865f34eac6c811.tar.bz2 | |
target/arm_dpm: uniform names of exported functions
The name of the function dpm_modeswitch() does not follow the
common style of the other function names in the same file.
Rename it as arm_dpm_modeswitch().
Change-Id: Idebf3c7bbddcd9b3c7b44f8d0dea1e5f7549b0eb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4756
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/target/cortex_a.c')
| -rw-r--r-- | src/target/cortex_a.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 2768e18..77859d3 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -113,7 +113,7 @@ static int cortex_a_prep_memaccess(struct target *target, int phys_access) int mmu_enabled = 0; if (phys_access == 0) { - dpm_modeswitch(&armv7a->dpm, ARM_MODE_SVC); + arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_SVC); cortex_a_mmu(target, &mmu_enabled); if (mmu_enabled) cortex_a_mmu_modify(target, 1); @@ -148,7 +148,7 @@ static int cortex_a_post_memaccess(struct target *target, int phys_access) 0, 0, 3, 0, cortex_a->cp15_dacr_reg); } - dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY); + arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY); } else { int mmu_enabled = 0; cortex_a_mmu(target, &mmu_enabled); @@ -1011,7 +1011,7 @@ static int cortex_a_internal_restore(struct target *target, int current, arm->pc->valid = 1; /* restore dpm_mode at system halt */ - dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY); + arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY); /* called it now before restoring context because it uses cpu * register r0 for restoring cp15 control register */ retval = cortex_a_restore_cp15_control_reg(target); @@ -1277,7 +1277,7 @@ static int cortex_a_post_debug_entry(struct target *target) cortex_a->curr_mode = armv7a->arm.core_mode; /* switch to SVC mode to read DACR */ - dpm_modeswitch(&armv7a->dpm, ARM_MODE_SVC); + arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_SVC); armv7a->arm.mrc(target, 15, 0, 0, 3, 0, &cortex_a->cp15_dacr_reg); @@ -1285,7 +1285,7 @@ static int cortex_a_post_debug_entry(struct target *target) LOG_DEBUG("cp15_dacr_reg: %8.8" PRIx32, cortex_a->cp15_dacr_reg); - dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY); + arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY); return ERROR_OK; } |