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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2016-09-15 09:13:51 +0200
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>2017-02-10 14:04:16 +0100
commita9931e6a3ce9672a63e05790efa167a677a36da5 (patch)
tree7572212aa7ed74e846e5481368223e9dbed72d64 /src/target/armv8.h
parent6b392dea66bbf72fef74fa8262385157a24f3750 (diff)
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aarch64: add basic Aarch32 support
Add database for common, equivalent opcodes for Aarch32 and Aarch64 execution states Revisit all functions that access Aarch64 specific registers or use Aarch64 opcodes and rewrite them to act depending on current state of the core. Add core register access functions for Aarch32 state Add function to determine the core execution state without reading DSPSR. Change-Id: I345e9f6d682fb4ba454e4b1d16bb5e1b27570691 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Diffstat (limited to 'src/target/armv8.h')
-rw-r--r--src/target/armv8.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/target/armv8.h b/src/target/armv8.h
index f6859b2..fa3674b 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -116,6 +116,10 @@ struct armv8_mmu_common {
uint64_t ttbr0_mask;/* masked to be used */
uint32_t os_border;
+ uint32_t ttbcr; /* cache for ttbcr register */
+ uint32_t ttbr_mask[2];
+ uint32_t ttbr_range[2];
+
int (*read_physical_memory)(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer);
struct armv8_cache_common armv8_cache;
@@ -133,6 +137,8 @@ struct armv8_common {
uint32_t cti_base;
struct adiv5_ap *debug_ap;
+ const uint32_t *opcodes;
+
/* mdir */
uint8_t multi_processor_system;
uint8_t cluster_id;
@@ -144,7 +150,6 @@ struct armv8_common {
uint32_t page_size;
uint64_t ttbr_base;
- /* cache specific to V7 Memory Management Unit compatible with v4_5*/
struct armv8_mmu_common armv8_mmu;
/* Direct processor core register read and writes */