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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2016-09-16 15:18:47 +0200
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>2017-02-10 14:01:39 +0100
commit03861123d7ea0f031643afc0faa87027c58cbd11 (patch)
tree56efee8fd7b09927f5aea5b88d3c7a479e2b58f8 /src/target/armv8.h
parent667c1d0d16784d77c430f3f2a773ad2da4b72ea0 (diff)
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aarch64: remove armv7-a virt-to-phys code
Page table layout in aarch64 is very different from armv7-a layout. Remove the incorrect handling, to be replaced correct armv8 code in a later patch Change-Id: I64c728a72a24f9f4177726ccc07a02a8ca0d56ce Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Diffstat (limited to 'src/target/armv8.h')
-rw-r--r--src/target/armv8.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/target/armv8.h b/src/target/armv8.h
index b9e3f12..884d39a 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -228,6 +228,18 @@ target_to_armv8(struct target *target)
#define CTI_GATE 0x140
#define CTI_UNLOCK 0xFB0
+#define PAGE_SIZE_4KB 0x1000
+#define PAGE_SIZE_4KB_LEVEL0_BITS 39
+#define PAGE_SIZE_4KB_LEVEL1_BITS 30
+#define PAGE_SIZE_4KB_LEVEL2_BITS 21
+#define PAGE_SIZE_4KB_LEVEL3_BITS 12
+
+#define PAGE_SIZE_4KB_LEVEL0_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL0_BITS)
+#define PAGE_SIZE_4KB_LEVEL1_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL1_BITS)
+#define PAGE_SIZE_4KB_LEVEL2_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL2_BITS)
+#define PAGE_SIZE_4KB_LEVEL3_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL3_BITS)
+
+#define PAGE_SIZE_4KB_TRBBASE_MASK 0xFFFFFFFFF000
int armv8_arch_state(struct target *target);
int armv8_identify_cache(struct target *target);