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| author | Tomas Vanek <vanekt@fbl.cz> | 2020-10-22 20:36:30 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-11-15 21:09:08 +0000 |
| commit | b1f488ec1ea4c8b5410026610c621f85b5ff17f3 (patch) | |
| tree | 013edd9d573169f008385c0b799fc6e85a9aa9dd /src/target/armv7m.c | |
| parent | 608299484d52a60082bb7ff5bcde5249f9a3a1de (diff) | |
| download | riscv-openocd-b1f488ec1ea4c8b5410026610c621f85b5ff17f3.zip riscv-openocd-b1f488ec1ea4c8b5410026610c621f85b5ff17f3.tar.gz riscv-openocd-b1f488ec1ea4c8b5410026610c621f85b5ff17f3.tar.bz2 | |
target/armv7m, cortex_m: fix misleading comments
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5876
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target/armv7m.c')
| -rw-r--r-- | src/target/armv7m.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 13370b5..f14ce0d 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -493,8 +493,7 @@ int armv7m_start_algorithm(struct target *target, return ERROR_TARGET_NOT_HALTED; } - /* refresh core register cache - * Not needed if core register cache is always consistent with target process state */ + /* Store all non-debug execution registers to armv7m_algorithm_info context */ for (unsigned i = 0; i < armv7m->arm.core_cache->num_regs; i++) { armv7m_algorithm_info->context[i] = buf_get_u32( |