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| author | Dominik Peklo <dom.peklo@gmail.com> | 2018-07-12 20:44:28 +1000 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-11-03 11:18:18 +0000 |
| commit | cea40152f82f52bfc718c7bda9fa4a9d70bf9cfd (patch) | |
| tree | eede28649bf43900737f4a3dfc194c280ca2ecd6 /src/target/arm_dpm.h | |
| parent | 1e3ba2046cf93dd037fd6e5c7babf95dd2716a1f (diff) | |
| download | riscv-openocd-cea40152f82f52bfc718c7bda9fa4a9d70bf9cfd.zip riscv-openocd-cea40152f82f52bfc718c7bda9fa4a9d70bf9cfd.tar.gz riscv-openocd-cea40152f82f52bfc718c7bda9fa4a9d70bf9cfd.tar.bz2 | |
flash/nor/stm32f1x: Use of protection blocks, improved option bytes handling
Handle write protection status in blocks instead of sectors, removing
unnecessary complexity in the process. Now closer to stm32f2x.
Support sequential modification of option bytes by read/modify/write
directly to option bytes area instead of always starting with the
currently loaded bytes from FLASH_OBR/WRPR registers.
Added new command 'options_load' to force re-load of option bytes w/o
having to power cycle target.
Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4576
Tested-by: jenkins
Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
Diffstat (limited to 'src/target/arm_dpm.h')
0 files changed, 0 insertions, 0 deletions