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| author | Tomas Vanek <vanekt@fbl.cz> | 2023-03-14 13:30:49 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-09-23 14:36:57 +0000 |
| commit | f49bf1adb42e3ae1b63da5d6e615c6f28b49f42a (patch) | |
| tree | 1508e3feb62dd9ba26bf93b90e27bc03fd1a1838 /src/target/arm_adi_v5.h | |
| parent | eb22a37b42a7944694243b690bfbd736e1ef52e8 (diff) | |
| download | riscv-openocd-f49bf1adb42e3ae1b63da5d6e615c6f28b49f42a.zip riscv-openocd-f49bf1adb42e3ae1b63da5d6e615c6f28b49f42a.tar.gz riscv-openocd-f49bf1adb42e3ae1b63da5d6e615c6f28b49f42a.tar.bz2 | |
target/arm_adi_v5,jtag/drivers: rename ADIv5 only defines
DP_SELECT_APSEL and DP_SELECT_APBANK is no more used in ADIv6.
Change-Id: I4176574d46c6dc8eb3fe3aef6daab6e33492c050
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7538
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target/arm_adi_v5.h')
| -rw-r--r-- | src/target/arm_adi_v5.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 90d28bc..e215893 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -97,16 +97,16 @@ #define DP_DLPIDR_PROTVSN 1u -#define DP_SELECT_APSEL 0xFF000000 -#define DP_SELECT_APBANK 0x000000F0 -#define DP_SELECT_DPBANK 0x0000000F -#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */ +#define ADIV5_DP_SELECT_APSEL 0xFF000000 +#define ADIV5_DP_SELECT_APBANK 0x000000F0 +#define DP_SELECT_DPBANK 0x0000000F +#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */ -#define DP_APSEL_MAX (255) /* for ADIv5 only */ -#define DP_APSEL_INVALID 0xF00 /* more than DP_APSEL_MAX and not ADIv6 aligned 4k */ +#define DP_APSEL_MAX (255) /* Strict limit for ADIv5, number of AP buffers for ADIv6 */ +#define DP_APSEL_INVALID 0xF00 /* more than DP_APSEL_MAX and not ADIv6 aligned 4k */ -#define DP_TARGETSEL_INVALID 0xFFFFFFFFU -#define DP_TARGETSEL_DPID_MASK 0x0FFFFFFFU +#define DP_TARGETSEL_INVALID 0xFFFFFFFFU +#define DP_TARGETSEL_DPID_MASK 0x0FFFFFFFU #define DP_TARGETSEL_INSTANCEID_MASK 0xF0000000U #define DP_TARGETSEL_INSTANCEID_SHIFT 28 |