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| author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-25 13:10:28 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-25 13:14:31 -0700 |
| commit | faa6123e36a4a6a7a1a4c8190a37ae5bfbe183bd (patch) | |
| tree | 7c6976acedc99b72af7a1a77eb3aff26309a7738 /src/target/algorithm.c | |
| parent | a1e07e58f4edbea92830fc75965a18b7b5030e17 (diff) | |
| download | riscv-openocd-faa6123e36a4a6a7a1a4c8190a37ae5bfbe183bd.zip riscv-openocd-faa6123e36a4a6a7a1a4c8190a37ae5bfbe183bd.tar.gz riscv-openocd-faa6123e36a4a6a7a1a4c8190a37ae5bfbe183bd.tar.bz2 | |
Invalidate the register cache on step, resume, reset
I thought OpenOCD did this, but it looks like that doesn't happen when
runningi in RTOS mode. With this I can get to the end of most of the
RTOS tests, but they SIGINT instead of exiting.
Diffstat (limited to 'src/target/algorithm.c')
0 files changed, 0 insertions, 0 deletions