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authorDaniel Anselmi <danselmi@gmx.ch>2022-12-17 13:11:30 +0100
committerAntonio Borneo <borneo.antonio@gmail.com>2023-09-23 14:34:40 +0000
commit302027094bfa9f331f5de2d25ecea01bac68a58a (patch)
tree92af9c078648c734a74f52f80bcff62d01adbb64 /src/pld/certus.c
parent536f2a9f2a7754d7975e2618bc19fcbc03e44f54 (diff)
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jtagspi/pld: add support from lattice certus driver
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice certus and certus po devices. Change-Id: I6a8ec16be78f86073a4ef5302f6241185b08e1c6 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7825 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/pld/certus.c')
-rw-r--r--src/pld/certus.c73
1 files changed, 73 insertions, 0 deletions
diff --git a/src/pld/certus.c b/src/pld/certus.c
index 1309c1b..8bfdff4 100644
--- a/src/pld/certus.c
+++ b/src/pld/certus.c
@@ -231,3 +231,76 @@ int lattice_certus_load(struct lattice_pld_device *lattice_device, struct lattic
return lattice_certus_exit_programming_mode(tap);
}
+
+int lattice_certus_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info)
+{
+ if (!pld_device_info)
+ return ERROR_FAIL;
+
+ struct jtag_tap *tap = pld_device_info->tap;
+ if (!tap)
+ return ERROR_FAIL;
+
+ if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) == PROGRAM_SPI)
+ return ERROR_OK;
+
+ // erase configuration
+ int retval = lattice_preload(pld_device_info);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = lattice_certus_enable_programming(tap);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = lattice_certus_erase_device(pld_device_info);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("erasing device failed");
+ return retval;
+ }
+
+ retval = lattice_certus_exit_programming_mode(tap);
+ if (retval != ERROR_OK)
+ return retval;
+
+ // connect jtag to spi pins
+ retval = lattice_set_instr(tap, PROGRAM_SPI, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+
+ struct scan_field field;
+ uint8_t buffer[2] = {0xfe, 0x68};
+ field.num_bits = 16;
+ field.out_value = buffer;
+ field.in_value = NULL;
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
+
+ return jtag_execute_queue();
+}
+
+int lattice_certus_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info)
+{
+ if (!pld_device_info)
+ return ERROR_FAIL;
+
+ struct jtag_tap *tap = pld_device_info->tap;
+ if (!tap)
+ return ERROR_FAIL;
+
+ /* Connecting it again takes way too long to do it multiple times for writing
+ a bitstream (ca. 0.4s each access).
+ We just leave it connected since SCS will not be active when not in shift_dr state.
+ So there is no need to change instruction, just make sure we are not in shift dr state. */
+ jtag_add_runtest(2, TAP_IDLE);
+ return jtag_execute_queue();
+}
+
+int lattice_certus_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits)
+{
+ if (!pld_device_info)
+ return ERROR_FAIL;
+
+ *facing_read_bits = 0;
+
+ return ERROR_OK;
+}