jtag: drivers: xlnx-pcie-xvc: Add support for SWD mode.

Add support for SWD debug to the Xilinx XVC/PCIe driver.

This is possible since the device is essentially a shift-register.
So doing SWD vs JTAG is a matter of wiring things correctly on the
RTL side (use TMS for SWDI, TDO for SWDO).

The clang static checker doesn't find any new problems with this change.

Change-Id: I3959e21440cd1036769e8e56a55e601d3e4aee9a
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5447
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 1ddf09f..a0ce7e3 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -610,7 +610,7 @@ produced, PDF schematics are easily found and it is easy to make.
 @* Link: @url{http://github.com/fjullien/jtag_vpi}
 
 @item @b{xlnx_pcie_xvc}
-@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG interface.
+@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface.
 
 @end itemize
 
@@ -3149,7 +3149,7 @@ version).
 @deffn {Interface Driver} {xlnx_pcie_xvc}
 This driver supports the Xilinx Virtual Cable (XVC) over PCI Express.
 It is commonly found in Xilinx based PCI Express designs. It allows debugging
-fabric based JTAG devices such as Cortex-M1/M3 microcontrollers. Access to this is
+fabric based JTAG/SWD devices such as Cortex-M1/M3 microcontrollers. Access to this is
 exposed via extended capability registers in the PCI Express configuration space.
 
 For more information see Xilinx PG245 (Section on From_PCIE_to_JTAG mode).