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authorYasushi SHOJI <yashi@spacecubics.com>2021-04-06 18:51:57 +0900
committerAntonio Borneo <borneo.antonio@gmail.com>2021-04-18 15:31:22 +0100
commiteb6a5faf6ac8aa1791ada64e95768ff4ed29084c (patch)
tree753a8490762794c265112ab909c981d57cbec1cf /doc
parent0f06d943366154963c6f5eb70f52e70f64fe5c71 (diff)
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doc: Group adapter sub-commands
The commit 5280eb618a8cab46 fixed all `adapter_khz` and `adapter_nsrst_*` commands in the doc but missed grouping them. This let the commands `adapter speed`, `adapter srst pulse_width`, and `adapter srst delay` not indexed. Tell texinfo about adapter sub-commands by grouping them in one. Change-Id: Ida53c4f5cfe28827320c145c8d501d53e831623c Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com> Reviewed-on: http://openocd.zylin.com/6134 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/openocd.texi6
1 files changed, 3 insertions, 3 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6b74243..e39ff86 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3415,7 +3415,7 @@ may not be the fastest solution.
instead of @command{adapter speed}, but only for (ARM) cores and boards
which support adaptive clocking.
-@deffn {Command} adapter speed max_speed_kHz
+@deffn Command {adapter speed} max_speed_kHz
A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
JTAG interfaces usually support a limited number of
speeds. The speed actually used won't be faster
@@ -3585,13 +3585,13 @@ needing to cope with both architecture and board specific constraints.
@section Commands for Handling Resets
-@deffn {Command} adapter srst pulse_width milliseconds
+@deffn Command {adapter srst pulse_width} milliseconds
Minimum amount of time (in milliseconds) OpenOCD should wait
after asserting nSRST (active-low system reset) before
allowing it to be deasserted.
@end deffn
-@deffn {Command} adapter srst delay milliseconds
+@deffn Command {adapter srst delay} milliseconds
How long (in milliseconds) OpenOCD should wait after deasserting
nSRST (active-low system reset) before starting new JTAG operations.
When a board has a reset button connected to SRST line it will